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Hybrid Fault Tolerance Techniques To Detect Transient Faults In Embedded Processors
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Book Synopsis Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors by : José Rodrigo Azambuja
Download or read book Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors written by José Rodrigo Azambuja and published by Springer. This book was released on 2014-07-07 with total page 107 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques. The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time.
Book Synopsis Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation by : Alfredo Benso
Download or read book Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation written by Alfredo Benso and published by Springer Science & Business Media. This book was released on 2005-12-15 with total page 242 pages. Available in PDF, EPUB and Kindle. Book excerpt: This is a comprehensive guide to fault injection techniques used to evaluate the dependability of a digital system. The description and the critical analysis of different fault injection techniques and tools are authored by key scientists in the field of system dependability and fault tolerance.
Book Synopsis Hardware Security Training, Hands-on! by : Mark Tehranipoor
Download or read book Hardware Security Training, Hands-on! written by Mark Tehranipoor and published by Springer Nature. This book was released on 2023-06-29 with total page 331 pages. Available in PDF, EPUB and Kindle. Book excerpt: This is the first book dedicated to hands-on hardware security training. It includes a number of modules to demonstrate attacks on hardware devices and to assess the efficacy of the countermeasure techniques. This book aims to provide a holistic hands-on training to upper-level undergraduate engineering students, graduate students, security researchers, practitioners, and industry professionals, including design engineers, security engineers, system architects, and chief security officers. All the hands-on experiments presented in this book can be implemented on readily available Field Programmable Gate Array (FPGA) development boards, making it easy for academic and industry professionals to replicate the modules at low cost. This book enables readers to gain experiences on side-channel attacks, fault-injection attacks, optical probing attack, PUF, TRNGs, odometer, hardware Trojan insertion and detection, logic locking insertion and assessment, and more.
Book Synopsis FPGAs and Parallel Architectures for Aerospace Applications by : Fernanda Kastensmidt
Download or read book FPGAs and Parallel Architectures for Aerospace Applications written by Fernanda Kastensmidt and published by Springer. This book was released on 2015-12-07 with total page 319 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book introduces the concepts of soft errors in FPGAs, as well as the motivation for using commercial, off-the-shelf (COTS) FPGAs in mission-critical and remote applications, such as aerospace. The authors describe the effects of radiation in FPGAs, present a large set of soft-error mitigation techniques that can be applied in these circuits, as well as methods for qualifying these circuits under radiation. Coverage includes radiation effects in FPGAs, fault-tolerant techniques for FPGAs, use of COTS FPGAs in aerospace applications, experimental data of FPGAs under radiation, FPGA embedded processors under radiation and fault injection in FPGAs. Since dedicated parallel processing architectures such as GPUs have become more desirable in aerospace applications due to high computational power, GPU analysis under radiation is also discussed.
Book Synopsis Radiation Effects on Integrated Circuits and Systems for Space Applications by : Raoul Velazco
Download or read book Radiation Effects on Integrated Circuits and Systems for Space Applications written by Raoul Velazco and published by Springer. This book was released on 2019-04-10 with total page 401 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides readers with invaluable overviews and updates of the most important topics in the radiation-effects field, enabling them to face significant challenges in the quest for the insertion of ever-higher density and higher performance electronic components in satellite systems. Readers will benefit from the up-to-date coverage of the various primary (classical) sub-areas of radiation effects, including the space and terrestrial radiation environments, basic mechanisms of total ionizing dose, digital and analog single-event transients, basic mechanisms of single-event effects, system-level SEE analysis, device-level, circuit-level and system-level hardening approaches, and radiation hardness assurance. Additionally, this book includes in-depth discussions of several newer areas of investigation, and current challenges to the radiation effects community, such as radiation hardening by design, the use of Commercial-Off-The-Shelf (COTS) components in space missions, CubeSats and SmallSats, the use of recent generation FPGA’s in space, and new approaches for radiation testing and validation. The authors provide essential background and fundamentals, in addition to information on the most recent advances and challenges in the sub-areas of radiation effects. Provides a concise introduction to the fundamentals of radiation effects, latest research results, and new test methods and procedures; Discusses the radiation effects and mitigation solutions for advanced integrated circuits and systems designed to operate in harsh radiation environments; Includes coverage of the impact of Small Satellites in the space industry.
Book Synopsis On-line Error Detection and Fast Recover Techniques for Dependable Embedded Processors by : Matthias Pflanz
Download or read book On-line Error Detection and Fast Recover Techniques for Dependable Embedded Processors written by Matthias Pflanz and published by Springer. This book was released on 2003-07-31 with total page 133 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book presents a new approach to on-line observation and concurrent checking of processors by refining and improving known techniques and introducing new ideas.The proposed on-line error detection and fast recover techniques support and complement other established methods. In combination with other on-line observation priniciples and with a combined hardware-software test, these techniques are used to fulfill a complete self-check scheme for an embedded processor.
Book Synopsis VLSI-SoC: New Technology Enabler by : Carolina Metzler
Download or read book VLSI-SoC: New Technology Enabler written by Carolina Metzler and published by Springer Nature. This book was released on 2020-07-22 with total page 355 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, held in Cusco, Peru, in October 2019. The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.
Book Synopsis From Model-Driven Design to Resource Management for Distributed Embedded Systems by : Bernd Kleinjohann
Download or read book From Model-Driven Design to Resource Management for Distributed Embedded Systems written by Bernd Kleinjohann and published by Springer. This book was released on 2007-01-29 with total page 286 pages. Available in PDF, EPUB and Kindle. Book excerpt: From Model-Driven Design to Resource Management for Distributed Embedded Systems presents 16 original contributions and 12 invited papers presented at the Working Conference on Distributed and Parallel Embedded Systems - DIPES 2006, sponsored by the International Federation for Information Processing - IFIP. Coverage includes model-driven design, testing and evolution of embedded systems, timing analysis and predictability, scheduling, allocation, communication and resource management in distributed real-time systems.
Book Synopsis Design and Test Technology for Dependable Systems-on-chip by : Raimund Ubar
Download or read book Design and Test Technology for Dependable Systems-on-chip written by Raimund Ubar and published by IGI Global. This book was released on 2011-01-01 with total page 550 pages. Available in PDF, EPUB and Kindle. Book excerpt: "This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--
Book Synopsis Low-cost and Efficient Fault Detection and Diagnosis Schemes for Modern Cores by : Javier Sebastian Carretero Casado
Download or read book Low-cost and Efficient Fault Detection and Diagnosis Schemes for Modern Cores written by Javier Sebastian Carretero Casado and published by . This book was released on 2015 with total page 253 pages. Available in PDF, EPUB and Kindle. Book excerpt: Continuous improvements in transistor scaling together with microarchitectural advances have made possible the widespread adoption of high-performance processors across all market segments. However, the growing reliability threats induced by technology scaling and by the complexity of designs are challenging the production of cheap yet robust systems. Soft error trends are haunting, especially for combinational logic, and parity and ECC codes are therefore becoming insufficient as combinational logic turns into the dominant source of soft errors. Furthermore, experts are warning about the need to also address intermittent and permanent faults during processor runtime, as increasing temperatures and device variations will accelerate inherent aging phenomena. These challenges specially threaten the commodity segments, which impose requirements that existing fault tolerance mechanisms cannot offer. Current techniques based on redundant execution were devised in a time when high penalties were assumed for the sake of high reliability levels. Novel light-weight techniques are therefore needed to enable fault protection in the mass market segments. The complexity of designs is making post-silicon validation extremely expensive. Validation costs exceed design costs, and the number of discovered bugs is growing, both during validation and once products hit the market. Fault localization and diagnosis are the biggest bottlenecks, magnified by huge detection latencies, limited internal observability, and costly server farms to generate test outputs. This thesis explores two directions to address some of the critical challenges introduced by unreliable technologies and by the limitations of current validation approaches. We first explore mechanisms for comprehensively detecting multiple sources of failures in modern processors during their lifetime (including transient, intermittent, permanent and also design bugs). Our solutions embrace a paradigm where fault tolerance is built based on exploiting high-level microarchitectural invariants that are reusable across designs, rather than relying on re-execution or ad-hoc block-level protection. To do so, we decompose the basic functionalities of processors into high-level tasks and propose three novel runtime verification solutions that combined enable global error detection: a computation/register dataflow checker, a memory dataflow checker, and a control flow checker. The techniques use the concept of end-to-end signatures and allow designers to adjust the fault coverage to their needs, by trading-off area, power and performance. Our fault injection studies reveal that our methods provide high coverage levels while causing significantly lower performance, power and area costs than existing techniques. Then, this thesis extends the applicability of the proposed error detection schemes to the validation phases. We present a fault localization and diagnosis solution for the memory dataflow by combining our error detection mechanism, a new low-cost logging mechanism and a diagnosis program. Selected internal activity is continuously traced and kept in a memory-resident log whose capacity can be expanded to suite validation needs. The solution can catch undiscovered bugs, reducing the dependence on simulation farms that compute golden outputs. Upon error detection, the diagnosis algorithm analyzes the log to automatically locate the bug, and also to determine its root cause. Our evaluations show that very high localization coverage and diagnosis accuracy can be obtained at very low performance and area costs. The net result is a simplification of current debugging practices, which are extremely manual, time consuming and cumbersome. Altogether, the integrated solutions proposed in this thesis capacitate the industry to deliver more reliable and correct processors as technology evolves into more complex designs and more vulnerable transistors.
Book Synopsis Fault-Tolerance Techniques for High-Performance Computing by : Thomas Herault
Download or read book Fault-Tolerance Techniques for High-Performance Computing written by Thomas Herault and published by Springer. This book was released on 2015-07-01 with total page 325 pages. Available in PDF, EPUB and Kindle. Book excerpt: This timely text presents a comprehensive overview of fault tolerance techniques for high-performance computing (HPC). The text opens with a detailed introduction to the concepts of checkpoint protocols and scheduling algorithms, prediction, replication, silent error detection and correction, together with some application-specific techniques such as ABFT. Emphasis is placed on analytical performance models. This is then followed by a review of general-purpose techniques, including several checkpoint and rollback recovery protocols. Relevant execution scenarios are also evaluated and compared through quantitative models. Features: provides a survey of resilience methods and performance models; examines the various sources for errors and faults in large-scale systems; reviews the spectrum of techniques that can be applied to design a fault-tolerant MPI; investigates different approaches to replication; discusses the challenge of energy consumption of fault-tolerance methods in extreme-scale systems.
Book Synopsis Fault Tolerance in Mobile Embedded Computer Networks by : Rajesh Venkatasubramanian
Download or read book Fault Tolerance in Mobile Embedded Computer Networks written by Rajesh Venkatasubramanian and published by . This book was released on 2005 with total page 360 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Applied Reconfigurable Computing by : Stephan Wong
Download or read book Applied Reconfigurable Computing written by Stephan Wong and published by Springer. This book was released on 2017-03-30 with total page 338 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the refereed proceedings of the 13th International Symposium on Applied Reconfigurable Computing, ARC 2017, held in Delft, The Netherlands, in April 2017. The 17 full papers and 11 short papers presented in this volume were carefully reviewed and selected from 49 submissions. They are organized in topical sections on adaptive architectures, embedded computing and security, simulation and synthesis, design space exploration, fault tolerance, FGPA-based designs, neural neworks, and languages and estimation techniques.
Author :Management Association, Information Resources Publisher :IGI Global ISBN 13 :1466619465 Total Pages :2090 pages Book Rating :4.4/5 (666 download)
Book Synopsis Industrial Engineering: Concepts, Methodologies, Tools, and Applications by : Management Association, Information Resources
Download or read book Industrial Engineering: Concepts, Methodologies, Tools, and Applications written by Management Association, Information Resources and published by IGI Global. This book was released on 2012-08-31 with total page 2090 pages. Available in PDF, EPUB and Kindle. Book excerpt: Industrial engineering affects all levels of society, with innovations in manufacturing and other forms of engineering oftentimes spawning cultural or educational shifts along with new technologies. Industrial Engineering: Concepts, Methodologies, Tools, and Applications serves as a vital compendium of research, detailing the latest research, theories, and case studies on industrial engineering. Bringing together contributions from authors around the world, this three-volume collection represents the most sophisticated research and developments from the field of industrial engineering and will prove a valuable resource for researchers, academics, and practitioners alike.
Book Synopsis Energy-Efficient Fault-Tolerant Systems by : Jimson Mathew
Download or read book Energy-Efficient Fault-Tolerant Systems written by Jimson Mathew and published by Springer Science & Business Media. This book was released on 2013-09-07 with total page 347 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes the state-of-the-art in energy efficient, fault-tolerant embedded systems. It covers the entire product lifecycle of electronic systems design, analysis and testing and includes discussion of both circuit and system-level approaches. Readers will be enabled to meet the conflicting design objectives of energy efficiency and fault-tolerance for reliability, given the up-to-date techniques presented.
Book Synopsis Improving Transient Fault Tolerance of Slipstream Processors by :
Download or read book Improving Transient Fault Tolerance of Slipstream Processors written by and published by . This book was released on 2004 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: A slipstream processor runs two copies of a program, one slightly ahead of the other, to achieve both higher single-program performance and transient fault tolerance. The leading copy of the program, or the Advanced Stream (A-stream), is accelerated by executing only a key subset of all instructions. The partial A-stream is speculative. Therefore, a second, complete copy of the program, called the Redundant Stream (R-stream), receives and checks all A-stream outcomes. The R-stream is also accelerated in this process. Together, the A-stream and R-stream finish faster than a single program copy would. The partial redundancy between the A-stream and R-stream enables detection and recovery from transient faults. A transient fault that affects a redundantly executed instruction is easily detected, because its two instances will differ. However, a transient fault that affects a singly executed instruction (instruction removed from A-stream) is difficult to detect directly, because there is no redundant counterpart for comparison. Actually, a fault in a singly executed instruction is indirectly detectable via a redundantly executed consumer. However, such a fault is unrecoverable since the fault is attributed to the consumer. Recovery is initiated too late, from the consumer instead of the faulty producer. We propose a mechanism that conservatively attributes a detected fault, not to the redundantly executed instruction that detected it, but to its singly executed producer. Accordingly, recovery is initiated safely from the singly executed producer. Our approach works by forming a forward slice for each singly executed instruction, terminating in its direct/indirect redundantly executed consumers. Now, a consumer can mark its singly executed producer as faulty when its comparison mismatches. A singly executed branch does not have a forward slice and thus is not checkable by consumers. However, the branch was removed from the A-stream precisely because its branch prediction.
Book Synopsis Future Information Technology by : James J. Park
Download or read book Future Information Technology written by James J. Park and published by Springer Science & Business Media. This book was released on 2011-07-05 with total page 546 pages. Available in PDF, EPUB and Kindle. Book excerpt: This two-volume-set constitutes the refereed proceedings of the 6th International Conference on Future Information Technology, FutureTech 2011, held in Crete, Greece, in June 2011. The 123 revised full papers presented in both volumes were carefully reviewed and selected from numerous submissions. The papers are organized in topical sections on future information technology, IT service and cloud computing; social computing, network, and services; forensics for future generation communication environments; intelligent transportation systems and applications; multimedia and semantic technologies; information science and technology.
