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Towards The Formal Verification Of The Requirements And Design Of A Processor Interface Unit Hol Listings
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Author :National Aeronautics and Space Administration (NASA) Publisher :Createspace Independent Publishing Platform ISBN 13 :9781723463242 Total Pages :186 pages Book Rating :4.4/5 (632 download)
Book Synopsis Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit by : National Aeronautics and Space Administration (NASA)
Download or read book Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit written by National Aeronautics and Space Administration (NASA) and published by Createspace Independent Publishing Platform. This book was released on 2018-07-23 with total page 186 pages. Available in PDF, EPUB and Kindle. Book excerpt: This technical report contains the Higher-Order Logic (HOL) listings of the partial verification of the requirements and design for a commercially developed processor interface unit (PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault tolerant computer system. This system, the Fault Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU verification as it currently exists. Section two of this report contains general-purpose HOL theories and definitions that support the PIU verification. These include arithmetic theories dealing with inequalities and associativity, and a collection of tactics used in the PIU proofs. Section three contains the HOL listings for the completed PIU design verification. Section 4 contains the HOL listings for the partial requirements verification of the P-Port. Fura, David A. and Windley, Phillip J. and Cohen, Gerald C. Unspecified Center AIRBORNE/SPACEBORNE COMPUTERS; AVIONICS; CHIPS (ELECTRONICS); COMPUTER PROGRAMS; DESIGN ANALYSIS; FAULT TOLERANCE; LOGIC DESIGN; MICROPROCESSORS; PROVING; SOFTWARE RELIABILITY; SPECIFICATIONS...
Book Synopsis Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit: HOL Listings by : David A. Fura
Download or read book Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit: HOL Listings written by David A. Fura and published by . This book was released on 1993 with total page 188 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit by : David A. Fura
Download or read book Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit written by David A. Fura and published by . This book was released on 1993 with total page 68 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Scientific and Technical Aerospace Reports by :
Download or read book Scientific and Technical Aerospace Reports written by and published by . This book was released on 1994 with total page 716 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Towards the Formal Specification of the Requirements and Design of a Processor Interface Unit by : David A. Fura
Download or read book Towards the Formal Specification of the Requirements and Design of a Processor Interface Unit written by David A. Fura and published by . This book was released on 1993 with total page 100 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author :National Aeronautics and Space Administration (NASA) Publisher :Createspace Independent Publishing Platform ISBN 13 :9781724694096 Total Pages :252 pages Book Rating :4.6/5 (94 download)
Book Synopsis Towards the Formal Specification of the Requirements and Design of a Processor Interface Unit by : National Aeronautics and Space Administration (NASA)
Download or read book Towards the Formal Specification of the Requirements and Design of a Processor Interface Unit written by National Aeronautics and Space Administration (NASA) and published by Createspace Independent Publishing Platform. This book was released on 2018-08-04 with total page 252 pages. Available in PDF, EPUB and Kindle. Book excerpt: This technical report contains the HOL listings of the specification of the design and major portions of the requirements for a commercially developed processor interface unit (or PIU). The PIU is an interface chip performing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. This report contains the actual HOL listings of the PIU specification as it currently exists. Section two of this report contains general-purpose HOL theories that support the PIU specification. These theories include definitions for the hardware components used in the PIU, our implementation of bit words, and our implementation of temporal logic. Section three contains the HOL listings for the PIU design specification. Aside from the PIU internal bus (I-Bus), this specification is complete. Section four contains the HOL listings for a major portion of the PIU requirements specification. Specifically, it contains most of the definition for the PIU behavior associated with memory accesses initiated by the local processor. Fura, David A. and Windley, Phillip J. and Cohen, Gerald C. Unspecified Center NASA-CR-191465, NAS 1.26:191465 NAS1-18586; RTOP 505-64-10-07...
Book Synopsis Monthly Catalogue, United States Public Documents by :
Download or read book Monthly Catalogue, United States Public Documents written by and published by . This book was released on 1994 with total page 752 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Monthly Catalog of United States Government Publications by :
Download or read book Monthly Catalog of United States Government Publications written by and published by . This book was released on 1994 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Towards the Formal Specification of the Requirements and Design of a Processor Interface Unit: HOL Listings by :
Download or read book Towards the Formal Specification of the Requirements and Design of a Processor Interface Unit: HOL Listings written by and published by . This book was released on 1993 with total page 254 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Government Reports Announcements & Index by :
Download or read book Government Reports Announcements & Index written by and published by . This book was released on 1994 with total page 684 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Government Reports Annual Index by :
Download or read book Government Reports Annual Index written by and published by . This book was released on 1994 with total page 1754 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Aeronautical Enginnering: A Cumulative Index to a Continuing Bibliography (supplement 312) by :
Download or read book Aeronautical Enginnering: A Cumulative Index to a Continuing Bibliography (supplement 312) written by and published by . This book was released on 1994 with total page 392 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author :National Aeronautics and Space Administration (NASA) Publisher :Createspace Independent Publishing Platform ISBN 13 :9781724220127 Total Pages :260 pages Book Rating :4.2/5 (21 download)
Book Synopsis Formal Design Specification of a Processor Interface Unit by : National Aeronautics and Space Administration (NASA)
Download or read book Formal Design Specification of a Processor Interface Unit written by National Aeronautics and Space Administration (NASA) and published by Createspace Independent Publishing Platform. This book was released on 2018-07-24 with total page 260 pages. Available in PDF, EPUB and Kindle. Book excerpt: This report describes work to formally specify the requirements and design of a processor interface unit (PIU), a single-chip subsystem providing memory-interface bus-interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance-free operation, or both. The need for high-quality design assurance in such applications is an undisputed fact, given the disastrous consequences that even a single design flaw can produce. Thus, the further development and application of formal methods to fault-tolerant systems is of critical importance as these systems see increasing use in modern society. Fura, David A. and Windley, Phillip J. and Cohen, Gerald C. Unspecified Center NASA-CR-189698, NAS 1.26:189698 NAS1-18586; RTOP 505-64-10-07...
Book Synopsis Formal Verification of Hardware Design by : Michael Yoeli
Download or read book Formal Verification of Hardware Design written by Michael Yoeli and published by . This book was released on 1990 with total page 352 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Design and Verification of Microprocessor Systems for High-Assurance Applications by : David S. Hardin
Download or read book Design and Verification of Microprocessor Systems for High-Assurance Applications written by David S. Hardin and published by Springer Science & Business Media. This book was released on 2010-03-02 with total page 441 pages. Available in PDF, EPUB and Kindle. Book excerpt: Microprocessors increasingly control and monitor our most critical systems, including automobiles, airliners, medical systems, transportation grids, and defense systems. The relentless march of semiconductor process technology has given engineers exponentially increasing transistor budgets at constant recurring cost. This has encouraged increased functional integration onto a single die, as well as increased architectural sophistication of the functional units themselves. Additionally, design cycle times are decreasing, thus putting increased schedule pressure on engineers. Not surprisingly, this environment has led to a number of uncaught design flaws. Traditional simulation-based design verification has not kept up with the scale or pace of modern microprocessor system design. Formal verification methods offer the promise of improved bug-finding capability, as well as the ability to establish functional correctness of a detailed design relative to a high-level specification. However, widespread use of formal methods has had to await breakthroughs in automated reasoning, integration with engineering design languages and processes, scalability, and usability. This book presents several breakthrough design and verification techniques that allow these powerful formal methods to be employed in the real world of high-assurance microprocessor system design.
Book Synopsis Formal Design Specification of a Processor Interface Unit by : David A. Fura
Download or read book Formal Design Specification of a Processor Interface Unit written by David A. Fura and published by . This book was released on 1992 with total page 262 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis ASIC/SoC Functional Design Verification by : Ashok B. Mehta
Download or read book ASIC/SoC Functional Design Verification written by Ashok B. Mehta and published by Springer. This book was released on 2017-06-28 with total page 346 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.
