On Chip Esd Protection For Integrated Circuits

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On-Chip ESD Protection for Integrated Circuits

Author : Albert Z.H. Wang
Publisher : Springer Science & Business Media
ISBN 13 : 0306476185
Total Pages : 310 pages
Book Rating : 4.3/5 (64 download)

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Book Synopsis On-Chip ESD Protection for Integrated Circuits by : Albert Z.H. Wang

Download or read book On-Chip ESD Protection for Integrated Circuits written by Albert Z.H. Wang and published by Springer Science & Business Media. This book was released on 2006-01-03 with total page 310 pages. Available in PDF, EPUB and Kindle. Book excerpt: This comprehensive and insightful book discusses ESD protection circuit design problems from an IC designer's perspective. On-Chip ESD Protection for Integrated Circuits: An IC Design Perspective provides both fundamental and advanced materials needed by a circuit designer for designing ESD protection circuits, including: Testing models and standards adopted by U.S. Department of Defense, EIA/JEDEC, ESD Association, Automotive Electronics Council, International Electrotechnical Commission, etc. ESD failure analysis, protection devices, and protection of sub-circuits Whole-chip ESD protection and ESD-to-circuit interactions Advanced low-parasitic compact ESD protection structures for RF and mixed-signal IC's Mixed-mode ESD simulation-design methodologies for design prediction ESD-to-circuit interactions, and more! Many real world ESD protection circuit design examples are provided. The book can be used as a reference book for working IC designers and as a textbook for students in the IC design field.

System Level ESD Protection

Author : Vladislav Vashchenko
Publisher : Springer Science & Business Media
ISBN 13 : 3319032216
Total Pages : 320 pages
Book Rating : 4.3/5 (19 download)

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Book Synopsis System Level ESD Protection by : Vladislav Vashchenko

Download or read book System Level ESD Protection written by Vladislav Vashchenko and published by Springer Science & Business Media. This book was released on 2014-03-21 with total page 320 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations.

Practical ESD Protection Design

Author : Albert Wang
Publisher : John Wiley & Sons
ISBN 13 : 1119850401
Total Pages : 436 pages
Book Rating : 4.1/5 (198 download)

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Book Synopsis Practical ESD Protection Design by : Albert Wang

Download or read book Practical ESD Protection Design written by Albert Wang and published by John Wiley & Sons. This book was released on 2022-01-06 with total page 436 pages. Available in PDF, EPUB and Kindle. Book excerpt: An authoritative single-volume reference on the design and analysis of ESD protection for ICs Electrostatic discharge (ESD) is a major reliability challenge to semiconductors, integrated circuits (ICs), and microelectronic systems. On-chip ESD protection is a vital to any electronic products, such as smartphones, laptops, tablets, and other electronic devices. Practical ESD Protection Design provides comprehensive and systematic guidance on all major aspects of designs of on-chip ESD protection for integrated circuits (ICs). Written for students and practicing engineers alike, this one-stop resource covers essential theories, hands-on design skills, computer-aided design (CAD) methods, characterization and analysis techniques, and more on ESD protection designs. Detailed chapters examine an array of topics ranging from fundamental to advanced, including ESD phenomena, ESD failure analysis, ESD testing models, ESD protection devices and circuits, ESD design layout and technology effects, ESD design flows and co-design methods, ESD modelling and CAD techniques, and future ESD protection concepts. Based on the author’s decades of design, research and teaching experiences, Practical ESD Protection Design: • Features numerous real-world ESD protection design examples • Emphasizes on ESD protection design techniques and procedures • Describes ESD-IC co-design methodology for high-performance mixed-signal ICs and broadband radio-frequency (RF) ICs • Discusses CAD-based ESD protection design optimization and prediction using both Technology and Electrical Computer-Aided Design (TCAD/ECAD) simulation • Addresses new ESD CAD algorithms and tools for full-chip ESD physical design verification • Explores the disruptive future outlook of ESD protection Practical ESD Protection Design is a valuable reference for industrial engineers and academic researchers in the field, and an excellent textbook for electronic engineering courses in semiconductor microelectronics and integrated circuit designs.

On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits

Author : Qiang Cui
Publisher : Springer
ISBN 13 : 3319108190
Total Pages : 86 pages
Book Rating : 4.3/5 (191 download)

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Book Synopsis On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits by : Qiang Cui

Download or read book On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits written by Qiang Cui and published by Springer. This book was released on 2015-03-10 with total page 86 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book enables readers to design effective ESD protection solutions for all mainstream RF fabrication processes (GaAs pHEMT, SiGe HBT, CMOS). The new techniques introduced by the authors have much higher protection levels and much lower parasitic effects than those of existing ESD protection devices. The authors describe in detail the ESD phenomenon, as well as ESD protection fundamentals, standards, test equipment, and basic design strategies. Readers will benefit from realistic case studies of ESD protection for RFICs and will learn to increase significantly modern RFICs’ ESD safety level, while maximizing RF performance.

On-chip ESD Protection in Integrated Circuits

Author : Markus P. J. Mergens
Publisher :
ISBN 13 : 9783896497017
Total Pages : 177 pages
Book Rating : 4.4/5 (97 download)

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Book Synopsis On-chip ESD Protection in Integrated Circuits by : Markus P. J. Mergens

Download or read book On-chip ESD Protection in Integrated Circuits written by Markus P. J. Mergens and published by . This book was released on 2001 with total page 177 pages. Available in PDF, EPUB and Kindle. Book excerpt:

ESD in Silicon Integrated Circuits

Author : E. Ajith Amerasekera
Publisher : John Wiley & Sons
ISBN 13 :
Total Pages : 434 pages
Book Rating : 4.3/5 (91 download)

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Book Synopsis ESD in Silicon Integrated Circuits by : E. Ajith Amerasekera

Download or read book ESD in Silicon Integrated Circuits written by E. Ajith Amerasekera and published by John Wiley & Sons. This book was released on 2002-05-22 with total page 434 pages. Available in PDF, EPUB and Kindle. Book excerpt: * Examines the various methods available for circuit protection, including coverage of the newly developed ESD circuit protection schemes for VLSI circuits. * Provides guidance on the implementation of circuit protection measures. * Includes new sections on ESD design rules, layout approaches, package effects, and circuit concepts. * Reviews the new Charged Device Model (CDM) test method and evaluates design requirements necessary for circuit protection.

ESD Protection Device and Circuit Design for Advanced CMOS Technologies

Author : Oleg Semenov
Publisher : Springer Science & Business Media
ISBN 13 : 1402083017
Total Pages : 228 pages
Book Rating : 4.4/5 (2 download)

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Book Synopsis ESD Protection Device and Circuit Design for Advanced CMOS Technologies by : Oleg Semenov

Download or read book ESD Protection Device and Circuit Design for Advanced CMOS Technologies written by Oleg Semenov and published by Springer Science & Business Media. This book was released on 2008-04-26 with total page 228 pages. Available in PDF, EPUB and Kindle. Book excerpt: ESD Protection Device and Circuit Design for Advanced CMOS Technologies is intended for practicing engineers working in the areas of circuit design, VLSI reliability and testing domains. As the problems associated with ESD failures and yield losses become significant in the modern semiconductor industry, the demand for graduates with a basic knowledge of ESD is also increasing. Today, there is a significant demand to educate the circuits design and reliability teams on ESD issues. This book makes an attempt to address the ESD design and implementation in a systematic manner. A design procedure involving device simulators as well as circuit simulator is employed to optimize device and circuit parameters for optimal ESD as well as circuit performance. This methodology, described in ESD Protection Device and Circuit Design for Advanced CMOS Technologies has resulted in several successful ESD circuit design with excellent silicon results and demonstrates its strengths.

Basic ESD and I/O Design

Author : Sanjay Dabral
Publisher : Wiley-Interscience
ISBN 13 :
Total Pages : 328 pages
Book Rating : 4.3/5 (91 download)

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Book Synopsis Basic ESD and I/O Design by : Sanjay Dabral

Download or read book Basic ESD and I/O Design written by Sanjay Dabral and published by Wiley-Interscience. This book was released on 1998 with total page 328 pages. Available in PDF, EPUB and Kindle. Book excerpt: This volume presents an integrated treatment of ESD, I/O, and process parameter interactions that both I/O designers and process designers can use. It examines key factors in I/O and ESD design and testing, and helps the reader consider ESD and reliability issues up front when making I/O choices. Emphasizing clarity and simplicity, this book focuses on design principles that can be applied widely as this dynamic field continues to evolve.

ESD Design Challenges and Strategies in Deeply-scaled Integrated Circuits

Author : Shuqing Cao
Publisher : Stanford University
ISBN 13 :
Total Pages : 137 pages
Book Rating : 4.F/5 ( download)

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Book Synopsis ESD Design Challenges and Strategies in Deeply-scaled Integrated Circuits by : Shuqing Cao

Download or read book ESD Design Challenges and Strategies in Deeply-scaled Integrated Circuits written by Shuqing Cao and published by Stanford University. This book was released on 2010 with total page 137 pages. Available in PDF, EPUB and Kindle. Book excerpt: It is the main objective of this work to address the scaling and design challenges of ESD protection in deeply scaled technologies. First, the thesis introduces the on-chip ESD events, the scaling and design challenges, and the nomenclatures necessary for later chapters. The ESD design window and the I/O schematics for both rail clamping and local clamping ESD schemes are illustrated. Then, the thesis delves into the investigation of the input and output driver devices and examines their robustness under ESD. The input driver's oxide breakdown levels are evaluated in deeply scaled technologies. The output driver's trigger and breakdown voltages are improved appreciably by applying circuit and device design techniques. The ESD device sections first discuss rail-based clamping, a widely used protection scheme. Two diode-based devices, namely the gated diode and substrate diode, are investigated in detail with SOI test structures. Characterization is based on DC current-voltage (I-V), Very Fast Transmission Line Pulse (VF-TLP), capacitance, and leakage measurements. Improvements in performance are realized. Technology computer aided design (TCAD) simulations help understand the physical effects and design tradeoffs. Then, the following section focuses on the local clamping scheme. Two devices, the field-effect diode (FED) and the double-well FED (DWFED), are developed and optimized in an SOI technology. Trigger circuits are designed to improve the turn-on speed. The advantages of local clamping is highlighted and compared with the rail-based clamping. The results show that the FED is a suitable option for power clamping applications and the DWFED is most suitable for pad-based local clamping. The thesis presents an ESD protection design methodology, which takes advantage of the results and techniques from pervious chapters and put each element into a useful format. Based on the correlation of package level and in-lab test results, a design process based on CDM target definition and device optimization, discharge path analysis, parasitic minimization, I/O data rate estimation and finally ESD and performance characterization is used sequentially to systematically realize the overall design goals.

Electrostatic Discharge Protection

Author : Juin J. Liou
Publisher : CRC Press
ISBN 13 : 1351830988
Total Pages : 406 pages
Book Rating : 4.3/5 (518 download)

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Book Synopsis Electrostatic Discharge Protection by : Juin J. Liou

Download or read book Electrostatic Discharge Protection written by Juin J. Liou and published by CRC Press. This book was released on 2017-12-19 with total page 406 pages. Available in PDF, EPUB and Kindle. Book excerpt: Electrostatic discharge (ESD) is one of the most prevalent threats to electronic components. In an ESD event, a finite amount of charge is transferred from one object (i.e., human body) to another (i.e., microchip). This process can result in a very high current passing through the microchip within a very short period of time. Thus, more than 35 percent of single-event chip damages can be attributed to ESD events, and designing ESD structures to protect integrated circuits against the ESD stresses is a high priority in the semiconductor industry. Electrostatic Discharge Protection: Advances and Applications delivers timely coverage of component- and system-level ESD protection for semiconductor devices and integrated circuits. Bringing together contributions from internationally respected researchers and engineers with expertise in ESD design, optimization, modeling, simulation, and characterization, this book bridges the gap between theory and practice to offer valuable insight into the state of the art of ESD protection. Amply illustrated with tables, figures, and case studies, the text: Instills a deeper understanding of ESD events and ESD protection design principles Examines vital processes including Si CMOS, Si BCD, Si SOI, and GaN technologies Addresses important aspects pertinent to the modeling and simulation of ESD protection solutions Electrostatic Discharge Protection: Advances and Applications provides a single source for cutting-edge information vital to the research and development of effective, robust ESD protection solutions for semiconductor devices and integrated circuits.

ESD

Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 0470061391
Total Pages : 420 pages
Book Rating : 4.4/5 (7 download)

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Book Synopsis ESD by : Steven H. Voldman

Download or read book ESD written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2006-11-02 with total page 420 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the growth of high-speed telecommunications and wireless technology, it is becoming increasingly important for engineers to understand radio frequency (RF) applications and their sensitivity to electrostatic discharge (ESD) phenomena. This enables the development of ESD design methods for RF technology, leading to increased protection against electrical overstress (EOS) and ESD. ESD: RF Technology and Circuits: Presents methods for co-synthesizisng ESD networks for RF applications to achieve improved performance and ESD protection of semiconductor chips; discusses RF ESD design methods of capacitance load transformation, matching network co-synthesis, capacitance shunts, inductive shunts, impedance isolation, load cancellation methods, distributed loads, emitter degeneration, buffering and ballasting; examines ESD protection and design of active and passive elements in RF complementary metal-oxide-semiconductor (CMOS), RF laterally-diffused metal oxide semiconductor (LDMOS), RF BiCMOS Silicon Germanium (SiGe), RF BiCMOS Silicon Germanium Carbon (SiGeC), and Gallim Arsenide technology; gives information on RF ESD testing methodologies, RF degradation effects, and failure mechanisms for devices, circuits and systems; highlights RF ESD mixed-signal design integration of digital, analog and RF circuitry; sets out examples of RF ESD design computer aided design methodologies; covers state-of-the-art RF ESD input circuits, as well as voltage-triggered to RC-triggered ESD power clamps networks in RF technologies, as well as off-chip protection concepts. Following the authors series of books on ESD, this book will be a thorough overview of ESD in RF technology for RF semiconductor chip and ESD engineers. Device and circuit engineers working in the RF domain, and quality, reliability and failure analysis engineers will also find it a valuable reference in the rapidly growing are of RF ESD design. In addition, it will appeal to graduate students in RF microwave technology and RF circuit design.

Modeling of Electrical Overstress in Integrated Circuits

Author : Carlos H. Diaz
Publisher : Springer Science & Business Media
ISBN 13 : 1461527880
Total Pages : 165 pages
Book Rating : 4.4/5 (615 download)

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Book Synopsis Modeling of Electrical Overstress in Integrated Circuits by : Carlos H. Diaz

Download or read book Modeling of Electrical Overstress in Integrated Circuits written by Carlos H. Diaz and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 165 pages. Available in PDF, EPUB and Kindle. Book excerpt: Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrical Overstress in Integrated Circuits presents a comprehensive analysis of EOS/ESD-related failures in I/O protection devices in integrated circuits. The design of I/O protection circuits has been done in a hit-or-miss way due to the lack of systematic analysis tools and concrete design guidelines. In general, the development of on-chip protection structures is a lengthy expensive iterative process that involves tester design, fabrication, testing and redesign. When the technology is changed, the same process has to be repeated almost entirely. This can be attributed to the lack of efficient CAD tools capable of simulating the device behavior up to the onset of failure which is a 3-D electrothermal problem. For these reasons, it is important to develop and use an adequate measure of the EOS robustness of integrated circuits in order to address the on-chip EOS protection issue. Fundamental understanding of the physical phenomena leading to device failures under ESD/EOS events is needed for the development of device models and CAD tools that can efficiently describe the device behavior up to the onset of thermal failure. Modeling of Electrical Overstress in Integrated Circuits is for VLSI designers and reliability engineers, particularly those who are working on the development of EOS/ESD analysis tools. CAD engineers working on development of circuit level and device level electrothermal simulators will also benefit from the material covered. This book will also be of interest to researchers and first and second year graduate students working in semiconductor devices and IC reliability fields.

Transient-Induced Latchup in CMOS Integrated Circuits

Author : Ming-Dou Ker
Publisher : John Wiley & Sons
ISBN 13 : 0470824085
Total Pages : 265 pages
Book Rating : 4.4/5 (78 download)

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Book Synopsis Transient-Induced Latchup in CMOS Integrated Circuits by : Ming-Dou Ker

Download or read book Transient-Induced Latchup in CMOS Integrated Circuits written by Ming-Dou Ker and published by John Wiley & Sons. This book was released on 2009-07-23 with total page 265 pages. Available in PDF, EPUB and Kindle. Book excerpt: The book all semiconductor device engineers must read to gain a practical feel for latchup-induced failure to produce lower-cost and higher-density chips. Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process. Presents real cases and solutions that occur in commercial CMOS IC chips Equips engineers with the skills to conserve chip layout area and decrease time-to-market Written by experts with real-world experience in circuit design and failure analysis Distilled from numerous courses taught by the authors in IC design houses worldwide The only book to introduce TLU under system-level ESD and EFT tests This book is essential for practicing engineers involved in IC design, IC design management, system and application design, reliability, and failure analysis. Undergraduate and postgraduate students, specializing in CMOS circuit design and layout, will find this book to be a valuable introduction to real-world industry problems and a key reference during the course of their careers.

ESD

Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 1119992656
Total Pages : 260 pages
Book Rating : 4.1/5 (199 download)

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Book Synopsis ESD by : Steven H. Voldman

Download or read book ESD written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2011-04-04 with total page 260 pages. Available in PDF, EPUB and Kindle. Book excerpt: Electrostatic discharge (ESD) continues to impact semiconductor components and systems as technologies scale from micro- to nano-electronics. This book studies electrical overstress, ESD, and latchup from a whole-chip ESD design synthesis approach. It provides a clear insight into the integration of ESD protection networks from a generalist perspective, followed by examples in specific technologies, circuits, and chips. Uniquely both the semiconductor chip integration issues and floorplanning of ESD networks are covered from a ‘top-down' design approach. Look inside for extensive coverage on: integration of cores, power bussing, and signal pins in DRAM, SRAM, CMOS image processing chips, microprocessors, analog products, RF components and how the integration influences ESD design and integration architecturing of mixed voltage, mixed signal, to RF design for ESD analysis floorplanning for peripheral and core I/O designs, and the implications on ESD and latchup guard ring integration for both a ‘bottom-up' and ‘top-down' methodology addressing I/O guard rings, ESD guard rings, I/O to I/O, and I/O to core classification of ESD power clamps and ESD signal pin circuitry, and how to make the correct choice for a given semiconductor chip examples of ESD design for the state-of-the-art technologies discussed, including CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, and smart power practical methods for the understanding of ESD circuit power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics ESD: Design and Synthesis is a continuation of the author's series of books on ESD protection. It is an essential reference for: ESD, circuit, and semiconductor engineers; design synthesis team leaders; layout design, characterisation, floorplanning, test and reliability engineers; technicians; and groundrule and test site developers in the manufacturing and design of semiconductor chips. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, and manufacturing sciences, and on courses involving the design of ESD devices, chips and systems. This book offers a useful insight into the issues that confront modern technology as we enter the nano-electronic era.

Counterfeit Integrated Circuits

Author : Mark (Mohammad) Tehranipoor
Publisher : Springer
ISBN 13 : 3319118242
Total Pages : 269 pages
Book Rating : 4.3/5 (191 download)

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Book Synopsis Counterfeit Integrated Circuits by : Mark (Mohammad) Tehranipoor

Download or read book Counterfeit Integrated Circuits written by Mark (Mohammad) Tehranipoor and published by Springer. This book was released on 2015-02-12 with total page 269 pages. Available in PDF, EPUB and Kindle. Book excerpt: This timely and exhaustive study offers a much-needed examination of the scope and consequences of the electronic counterfeit trade. The authors describe a variety of shortcomings and vulnerabilities in the electronic component supply chain, which can result in counterfeit integrated circuits (ICs). Not only does this book provide an assessment of the current counterfeiting problems facing both the public and private sectors, it also offers practical, real-world solutions for combatting this substantial threat. · Helps beginners and practitioners in the field by providing a comprehensive background on the counterfeiting problem; · Presents innovative taxonomies for counterfeit types, test methods, and counterfeit defects, which allows for a detailed analysis of counterfeiting and its mitigation; · Provides step-by-step solutions for detecting different types of counterfeit ICs; · Offers pragmatic and practice-oriented, realistic solutions to counterfeit IC detection and avoidance, for industry and government.

Simulation Methods for ESD Protection Development

Author : Harald Gossner
Publisher : Elsevier
ISBN 13 : 9780080526478
Total Pages : 304 pages
Book Rating : 4.5/5 (264 download)

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Book Synopsis Simulation Methods for ESD Protection Development by : Harald Gossner

Download or read book Simulation Methods for ESD Protection Development written by Harald Gossner and published by Elsevier. This book was released on 2003-10-16 with total page 304 pages. Available in PDF, EPUB and Kindle. Book excerpt: Simulation Methods for ESD Protection Development looks at the integration of new techniques into a comprehensive development flow, which is now available due advances made in the field during the recent years. These findings allow for an early, stable ESD concept at a very early stage of the technology development, which is essential now development cycles have been reduced. The book also offers ways of increasing the optimization and control of the technology concerning performance, thus making the process more cost effective and increasingly efficient. This title provides a guide through the latest research and technology presenting the ESD protection development methodology. This is based on a combination of process, device and circuit stimulation, and addresses the optimization of the industry critical issue, reduced development cycles.Written to address the needs of the ESD engineer, this text is required reading by all industry practitioners and researchers and students within this field. The FIRST Extensive overview on the subject of ESD simulation Addresses the industry critical issue of reduced development cycles, and provides solutions Presents the latest research in the field with high practical relevance and its results

ESD

Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 1118954475
Total Pages : 552 pages
Book Rating : 4.1/5 (189 download)

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Book Synopsis ESD by : Steven H. Voldman

Download or read book ESD written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2015-04-24 with total page 552 pages. Available in PDF, EPUB and Kindle. Book excerpt: ESD: Circuits and Devices 2nd Edition provides a clear picture of layout and design of digital, analog, radio frequency (RF) and power applications for protection from electrostatic discharge (ESD), electrical overstress (EOS), and latchup phenomena from a generalist perspective and design synthesis practices providing optimum solutions in advanced technologies. New features in the 2nd edition: Expanded treatment of ESD and analog design of passive devices of resistors, capacitors, inductors, and active devices of diodes, bipolar junction transistors, MOSFETs, and FINFETs. Increased focus on ESD power clamps for power rails for CMOS, Bipolar, and BiCMOS. Co-synthesizing of semiconductor chip architecture and floor planning with ESD design practices for analog, and mixed signal applications Illustrates the influence of analog design practices on ESD design circuitry, from integration, synthesis and layout, to symmetry, matching, inter-digitation, and common centroid techniques. Increased emphasis on system-level testing conforming to IEC 61000-4-2 and IEC 61000-4-5. Improved coverage of low-capacitance ESD, scaling of devices and oxide scaling challenges. ESD: Circuits and Devices 2nd Edition is an essential reference to ESD, circuit & semiconductor engineers and quality, reliability &analysis engineers. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, microelectronics and IC design.