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Nyquist Rate Analog To Digital Conversion With Calibration
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Book Synopsis Nyquist-rate Analog-to-digital Conversion with Calibration by : Bardia Pishdad
Download or read book Nyquist-rate Analog-to-digital Conversion with Calibration written by Bardia Pishdad and published by . This book was released on 2002 with total page 220 pages. Available in PDF, EPUB and Kindle. Book excerpt: "Analog-to-Digital Converter (ADC) microcircuits are required to meet stringent accuracy specifications in spite of their analog components' inherent nonidealities as well as the accuracy limitations due to fabrication technology. In this thesis, a 3-step Nyquist rate ADC is presented which makes use of bitstream processing to calibrate the digital-to-analog converter (DAC) and the residue amplifier, while using the same hardware to calibrate the sub-ADC. The system is designed to provide programmability and calibrate undesired circuit characteristics such as offset, gain error, and nonlinearity. Thus, the DAC can tolerate gain errors much higher than the standard amount, and has the potential to completely cancel nonlinearity and offsets in its transfer function. The offset of the residue amplifier can also be calibrated with this system. Moreover, the system eliminates the need for a reference ladder in the sub-ADC, and calibrates comparator offsets. Simulation and experimental results of the circuits fabricated in a 0.18mum CMOS process are presented." --
Book Synopsis Digital Calibration Algorithms for Nyquist-rate Analog to Digital Converters by : Anup Savla
Download or read book Digital Calibration Algorithms for Nyquist-rate Analog to Digital Converters written by Anup Savla and published by . This book was released on 2004 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: Continuous scaling down of CMOS device sizes and an accompanied increase in device switching speeds prompts the design of mixed-signal systems with increasingly complex digital signal processing and control algorithms accompanied by simpler analog circuitry. Analog to digital converter (ADC) is an essential mixed-signal component of modern receivers, where signals sensed from the source are converted to digital for further signal processing on them. In this dissertation, calibration techniques are presented which allow ADCs to be designed with large inherent gain and offset errors. The concept of arbitrary radix multistep conversion is presented, along with algorithms that enable reduced radix conversion with digital correction in pipelined or algorithmic ADCs. Calibration techniques that account for linear and nonlinear gain error are presented and adapted to the popular 1.5 bit/stage pipeline architecture. Calibration is performed purely with digital post-processing on ADC output bits, with no changes occurring in the analog hardware. In this dissertation a WCDMA/WLAN receiver architecture is presented and specifications are derived for all its components. Concept of reconfigurable ADC design is presented, which allows speed and power consumption optimization. Reduced radix digital correction, linear and nonlinear calibration and background-calibrating queues are presented and combined in two behavioral models. The reconfigurable ADC was fabricated in AMI0.5u 3V CMOS process, and achieved 55dB dynamic range at 45MS/s, consuming 51mW power. The reconfigured calibrated ADC was simulated in TSMC 0.18u 1.8V CMOS process, and achieved 63dB dynamic range at 25MS/s, consuming 3.6mW power. Measurements of the capture card showed a 1.6bit improvement in resolution with the use of calibration algorithms.
Book Synopsis Calibration Techniques in Nyquist A/D Converters by : Hendrik van der Ploeg
Download or read book Calibration Techniques in Nyquist A/D Converters written by Hendrik van der Ploeg and published by Springer Science & Business Media. This book was released on 2006-09-13 with total page 203 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book analyses different A/D-converter architectures with an emphasis on the maximum achievable power efficiency. It also provides an accessible overview of the state-of-the art in calibration techniques for Nyquist A/D converters. The calibration techniques presented are applicable to other analog-to-digital systems, such as those applied in integrated receivers. They allow implementation without introducing a speed or power penalty.
Book Synopsis Monolithic Nyquist Rate Analog to Digital Converter with Digital Calibration by : Yang Wu
Download or read book Monolithic Nyquist Rate Analog to Digital Converter with Digital Calibration written by Yang Wu and published by . This book was released on 2002 with total page 264 pages. Available in PDF, EPUB and Kindle. Book excerpt: "The design details of pipeline ADC is also discussed in this work. Quantitative analyses have been provided in determining design parameters in various subsystems. The analyses ensure that a 10-bit resolution is achieved for the pipeline ADC. Both Flash ADC and pipeline ADC were implemented in a 0.25 mum and 0.18 mum CMOS process respectively, and results demonstrating their successful operation are presented." --
Book Synopsis Online Calibration of Nyquist-rate Analog-to-digital Converters by : Udaykiran Eduri
Download or read book Online Calibration of Nyquist-rate Analog-to-digital Converters written by Udaykiran Eduri and published by . This book was released on 2005 with total page 182 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Digitally Assisted Techniques for Nyquist Rate Analog-to-Digital Converters by : Rabeeh Majidi
Download or read book Digitally Assisted Techniques for Nyquist Rate Analog-to-Digital Converters written by Rabeeh Majidi and published by . This book was released on 2015 with total page 204 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: With the advance of technology and rapid growth of digital systems, low power high speed analog-to- digital converters with great accuracy are in demand. To achieve high effective number of bits Analog-to-Digital Converter (ADC) calibration as a time consuming process is a potential bottleneck for designs. This dissertation presentsa fully digital background calibration algorithm for a 7- bit redundant flash ADC using split structure and look-up table based correction. Redundant comparators are used in the flash ADC design of this work in order to tolerate large offset voltages while minimizing signal input capacitance. The split ADC structure helps by eliminating the unknown input signal from the calibration path. The flash ADC has been designed in 180nm IBM CMOS technology and fabricated through MOSIS. This work was supported by Analog Devices, Wilmington, MA. While much research on ADC design has concentrated on increasing resolution and sample rate, there are many applications (e.g. biomedical devices and sensor networks) that do not require high performance but do require low power energy efficient ADCs. This dissertation also explores on design of a low quiescent current 100k Sps Successive Approximation (SAR) ADC that has been used as an error detection ADC for an automotive application in 350nm CD (CMOS-DMOS) technology. This work was supported by ON Semiconductor Corp, East Greenwich, RI.
Book Synopsis Time-interleaved Analog-to-Digital Converters by : Simon Louwsma
Download or read book Time-interleaved Analog-to-Digital Converters written by Simon Louwsma and published by Springer Science & Business Media. This book was released on 2010-09-08 with total page 148 pages. Available in PDF, EPUB and Kindle. Book excerpt: Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.
Book Synopsis Digital Background Calibration of Analog-to-digital Converters Using a Calibration Queue by : Ozan Ersan Erdoğan
Download or read book Digital Background Calibration of Analog-to-digital Converters Using a Calibration Queue written by Ozan Ersan Erdoğan and published by . This book was released on 1999 with total page 250 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Pipelined Analog-to-digital Conversion Using Class-AB Amplifiers by : Kyung Ryun Kim
Download or read book Pipelined Analog-to-digital Conversion Using Class-AB Amplifiers written by Kyung Ryun Kim and published by Stanford University. This book was released on 2010 with total page 128 pages. Available in PDF, EPUB and Kindle. Book excerpt: In high-performance pipelined analog-to-digital converters (ADCs), the residue amplifiers dissipate the majority of the overall converter power. Therefore, finding alternatives to the relatively inefficient, conventional class-A circuit realization is an active area of research. One option for improvement is to employ class-AB amplifiers, which can, in principle, provide large drive currents on demand and improve the efficiency of residue amplification. Unfortunately, due to the simultaneous demand for high speed and high gain in pipelined ADCs, the improvements seen in class-AB designs have so far been limited. This dissertation presents the design of an efficient class-AB amplification scheme based on a pseudo-differential, single-stage and cascode-free architecture. Nonlinear errors due to finite DC gain are addressed using a deterministic digital background calibration that measures the circuit imperfections in time intervals between normal conversion cycles of the ADC. As a proof of concept, a 12-bit 30-MS/s pipelined ADC was realized using class-AB amplifiers with the proposed digital calibration. The prototype ADC occupies an active area of 0.36 mm2 in 90-nm CMOS. It dissipates 2.95 mW from a 1.2-V supply and achieves an SNDR of 64.5 dB for inputs near the Nyquist frequency. The corresponding figure of merit is 72 fJ/conversion-step.
Book Synopsis Nyquist-Rate Switched-Capacitor Analog-to-Digital Converters by : Andreas John Inge Larsson
Download or read book Nyquist-Rate Switched-Capacitor Analog-to-Digital Converters written by Andreas John Inge Larsson and published by . This book was released on 2013 with total page 151 pages. Available in PDF, EPUB and Kindle. Book excerpt: The miniaturization and digitization of modern microelectronic systems have made Analog-to-Digital converters (ADC) key building components in many applications. Internet and entertainment technologies demand higher and higher performance from the hardware components in many communication and multimedia systems, but at the same time increased mobility demands less and less power consumption. Many applications, such as instrumentation, video, radar and communications, require very high accuracy and speed and with resolutions up to 16 bits and sampling rates in the 100s of MHz, pipelined ADCs are very suitable for such purposes. Resolutions above 10 bits often require very high power consumption and silicon area if no error correction technique is employed. Calibration relaxes the accuracy requirement of the individual building blocks of the ADC and enables power and area savings. Digital calibration is preferred over analog calibration due to higher robustness and accuracy. Furthermore, the microprocessors that process the digital information from the ADCs have constantly reduced cost and power consumption and improved performance due to technology scaling and innovative microprocessor architectures. The work in this dissertation presents a novel digital background calibration technique for high-speed, high-resolution pipelined ADCs. The technique is implemented in a 14 bit, 100 MS/s pipelined ADC fabricated in Taiwan Semiconductor Manufacturing Company (TSMC) 0.13 [mu]m Complementary Metal Oxide Semiconductor (CMOS) digital technology. The prototype ADC achieves better than 11.5 bits linearity at 100 MS/s and achieves a best-in-class figure of merit of 360 fJ/conversion-step. The core ADC has a power consumption of 105 mW and occupies an active area of 1.25 mm2. The work in this dissertation also presents a low-power, 8-bit algorithmic ADC. This ADC reduces power consumption at system level by minimizing voltage reference generation and ADC input capacitance. This ADC is implemented in International Business Machines Corporation (IBM) 90nm digital CMOS technology and achieves around 7.5 bits linearity at 0.25 MS/s with a power consumption of 300 [mu]W and an active area of 0.27 mm2. The electronic version of this dissertation is accessible from http://hdl.handle.net/1969.1/148307
Book Synopsis Background Calibration of Time-Interleaved Data Converters by : Manar El-Chammas
Download or read book Background Calibration of Time-Interleaved Data Converters written by Manar El-Chammas and published by Springer Science & Business Media. This book was released on 2011-12-17 with total page 138 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements. Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture.
Book Synopsis High Speed and Wide Bandwidth Delta-Sigma ADCs by : Muhammed Bolatkale
Download or read book High Speed and Wide Bandwidth Delta-Sigma ADCs written by Muhammed Bolatkale and published by Springer. This book was released on 2014-05-27 with total page 135 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes techniques for realizing wide bandwidth (125MHz) over-sampled analog-to-digital converters (ADCs) in nano meter-CMOS processes. The authors offer a clear and complete picture of system level challenges and practical design solutions in high-speed Delta-Sigma modulators. Readers will be enabled to implement ADCs as continuous-time delta-sigma (CT∆Σ) modulators, offering simple resistive inputs, which do not require the use of power-hungry input buffers, as well as offering inherent anti-aliasing, which simplifies system integration. The authors focus on the design of high speed and wide-bandwidth ΔΣMs that make a step in bandwidth range which was previously only possible with Nyquist converters. More specifically, this book describes the stability, power efficiency and linearity limits of ΔΣMs, aiming at a GHz sampling frequency.
Book Synopsis Digital Calibration of Double-sampled Time-interleaved Analog-to-digital Converters by : Chi Ho Law
Download or read book Digital Calibration of Double-sampled Time-interleaved Analog-to-digital Converters written by Chi Ho Law and published by . This book was released on 2009 with total page 290 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Mismatch Calibration of Time-interleaved Digital-to-analog Converters by : Rowena J. D'souza
Download or read book Mismatch Calibration of Time-interleaved Digital-to-analog Converters written by Rowena J. D'souza and published by . This book was released on 2010 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Digital Calibration of a Switched-capacitor Delta-sigma Analog-to-digital Converter by : Keith Anthony O'Donoghue
Download or read book Digital Calibration of a Switched-capacitor Delta-sigma Analog-to-digital Converter written by Keith Anthony O'Donoghue and published by . This book was released on 2009 with total page 158 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Signal Reconstruction Algorithms for Time-Interleaved ADCs by : Anu Kalidas Muralidharan Pillai
Download or read book Signal Reconstruction Algorithms for Time-Interleaved ADCs written by Anu Kalidas Muralidharan Pillai and published by Linköping University Electronic Press. This book was released on 2015-05-22 with total page 100 pages. Available in PDF, EPUB and Kindle. Book excerpt: An analog-to-digital converter (ADC) is a key component in many electronic systems. It is used to convert analog signals to the equivalent digital form. The conversion involves sampling which is the process of converting a continuous-time signal to a sequence of discrete-time samples, and quantization in which each sampled value is represented using a finite number of bits. The sampling rate and the effective resolution (number of bits) are two key ADC performance metrics. Today, ADCs form a major bottleneck in many applications like communication systems since it is difficult to simultaneously achieve high sampling rate and high resolution. Among the various ADC architectures, the time-interleaved analog-to-digital converter (TI-ADC) has emerged as a popular choice for achieving very high sampling rates and resolutions. At the principle level, by interleaving the outputs of M identical channel ADCs, a TI-ADC could achieve the same resolution as that of a channel ADC but with M times higher bandwidth. However, in practice, mismatches between the channel ADCs result in a nonuniformly sampled signal at the output of a TI-ADC which reduces the achievable resolution. Often, in TIADC implementations, digital reconstructors are used to recover the uniform-grid samples from the nonuniformly sampled signal at the output of the TI-ADC. Since such reconstructors operate at the TI-ADC output rate, reducing the number of computations required per corrected output sample helps to reduce the power consumed by the TI-ADC. Also, as the mismatch parameters change occasionally, the reconstructor should support online reconfiguration with minimal or no redesign. Further, it is advantageous to have reconstruction schemes that require fewer coefficient updates during reconfiguration. In this thesis, we focus on reducing the design and implementation complexities of nonrecursive finite-length impulse response (FIR) reconstructors. We propose efficient reconstruction schemes for three classes of nonuniformly sampled signals that can occur at the output of TI-ADCs. Firstly, we consider a class of nonuniformly sampled signals that occur as a result of static timing mismatch errors or due to channel mismatches in TI-ADCs. For this type of nonuniformly sampled signals, we propose three reconstructors which utilize a two-rate approach to derive the corresponding single-rate structure. The two-rate based reconstructors move part of the complexity to a symmetric filter and also simplifies the reconstruction problem. The complexity reduction stems from the fact that half of the impulse response coefficients of the symmetric filter are equal to zero and that, compared to the original reconstruction problem, the simplified problem requires only a simpler reconstructor. Next, we consider the class of nonuniformly sampled signals that occur when a TI-ADC is used for sub-Nyquist cyclic nonuniform sampling (CNUS) of sparse multi-band signals. Sub-Nyquist sampling utilizes the sparsities in the analog signal to sample the signal at a lower rate. However, the reduced sampling rate comes at the cost of additional digital signal processing that is needed to reconstruct the uniform-grid sequence from the sub-Nyquist sampled sequence obtained via CNUS. The existing reconstruction scheme is computationally intensive and time consuming and offsets the gains obtained from the reduced sampling rate. Also, in applications where the band locations of the sparse multi-band signal can change from time to time, the reconstructor should support online reconfigurability. Here, we propose a reconstruction scheme that reduces the computational complexity of the reconstructor and at the same time, simplifies the online reconfigurability of the reconstructor. Finally, we consider a class of nonuniformly sampled signals which occur at the output of TI-ADCs that use some of the input sampling instants for sampling a known calibration signal. The samples corresponding to the calibration signal are used for estimating the channel mismatch parameters. In such TI-ADCs, nonuniform sampling is due to the mismatches between the channel ADCs and due to the missing input samples corresponding to the sampling instants reserved for the calibration signal. We propose three reconstruction schemes for such nonuniformly sampled signals and show using design examples that, compared to a previous solution, the proposed schemes require substantially lower computational complexity.
Book Synopsis Analog-to-Digital Conversion by : Marcel J.M. Pelgrom
Download or read book Analog-to-Digital Conversion written by Marcel J.M. Pelgrom and published by Springer Science & Business Media. This book was released on 2010-07-24 with total page 469 pages. Available in PDF, EPUB and Kindle. Book excerpt: A book is like a window that allows you to look into the world. The window is shaped by the author and that makes that every window presents a unique view of the world. This is certainly true for this book. It is shaped by the topics and the projects throughout my career. Even more so, this book re?ects my own style of working and thinking. That starts already in Chap. 2. When I joined Philips Research in 1979, many of my colleagues used little paper notebooks to keep track of the most used equations and other practical things. This notebook was the beginning for Chap. 2: a collection of topics that form the basis for much of the other chapters. Chapter2 is not intended to explain these topics, but to refresh your knowledge and help you when you need some basics to solve more complex issues. In the chapters discussing the fundamental processes of conversion, you will r- ognize my preoccupation with mathematics. I really enjoy ?nding an equation that properly describes the underlying mechanism. Nevertheless mathematics is not a goalonitsown:theequationshelptounderstandthewaythevariablesareconnected to the result. Real insight comes from understanding the physics and electronics. In the chapters on circuit design I have tried to reduce the circuit diagrams to the s- plest form, but not simpler. . . I do have private opinions on what works and what should not be applied.
