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Author : Padmaja Nagaiah
Publisher :
ISBN 13 :
Total Pages : 167 pages
Book Rating : 4.:/5 (862 download)
Download or read book Development of III-V P-MOSFETs with High-kappa Gate Stack for Future CMOS Applications written by Padmaja Nagaiah and published by . This book was released on 2012 with total page 167 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Duygu Kuzum
Publisher : Stanford University
ISBN 13 :
Total Pages : 159 pages
Book Rating : 4.F/5 ( download)
Download or read book Interface-engineered Ge MOSFETs for Future High Performance CMOS Applications written by Duygu Kuzum and published by Stanford University. This book was released on 2009 with total page 159 pages. Available in PDF, EPUB and Kindle. Book excerpt: As the semiconductor industry approaches the limits of traditional silicon CMOS scaling, introduction of performance boosters like novel materials and innovative device structures has become necessary for the future of CMOS. High mobility materials are being considered to replace Si in the channel to achieve higher drive currents and switching speeds. Ge has particularly become of great interest as a channel material, owing to its high bulk hole and electron mobilities. However, replacement of Si channel by Ge requires several critical issues to be addressed in Ge MOS technology. High quality gate dielectric for surface passivation, low parasitic source/drain resistance and performance improvement in Ge NMOS are among the major challenges in realizing Ge CMOS. Detailed characterization of gate dielectric/channel interface and a deeper understanding of mobility degradation mechanisms are needed to address the Ge NMOS performance problem and to improve PMOS performance. In the first part of this dissertation, the electrical characterization results on Ge NMOS and PMOS devices fabricated with GeON gate dielectric are presented. Carrier scattering mechanisms are studied through low temperature mobility measurements. For the first time, the effect of substrate crystallographic orientation on inversion electron and hole mobilities is investigated. Direct formation of a high-k dielectric on Ge has not given good results in the past. A good quality interface layer is required before the deposition of a high-K dielectric. In the second part of this dissertation, ozone-oxidation process is introduced to engineer Ge/insulator interface. Electrical and structural characterizations and stability analysis are carried out and high quality Ge/dielectric interface with low interface trap density is demonstrated. Detailed extraction of interface trap density distribution across the bandgap and close to band edges of Ge, using low temperature conductance and capacitance measurements is presented. Ge N-MOSFETs have exhibited poor drive currents and low mobility, as reported by several different research groups worldwide. In spite of the increasing interest in Ge, the major mechanisms behind poor Ge NMOS performance have not been completely understood yet. In the last part of this dissertation, the results on Ge NMOS devices fabricated with the ozone-oxidation and the low temperature source/drain activation processes are discussed. These devices achieve the highest electron mobility to-date, about 1.5 times the universal Si mobility. Detailed interface characterizations, trapping analyses and gated Hall device measurements are performed to identify the mechanisms behind poor Ge NMOS performance in the past.
Author : Jacopo Franco
Publisher : Springer Science & Business Media
ISBN 13 : 9400776632
Total Pages : 203 pages
Book Rating : 4.4/5 (7 download)
Download or read book Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications written by Jacopo Franco and published by Springer Science & Business Media. This book was released on 2013-10-19 with total page 203 pages. Available in PDF, EPUB and Kindle. Book excerpt: Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5Å, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability. This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated. The extensive experimental datasets collected on a variety of processed 300mm wafers and presented here show the reliability improvement to be process - and architecture-independent and, as such, readily transferable to advanced device architectures as Tri-Gate (finFET) devices. We propose a physical model to understand the intrinsically superior reliability of the MOS system consisting of a Ge-based channel and a SiO2/HfO2 dielectric stack. The improved reliability properties here discussed strongly support (Si)Ge technology as a clear frontrunner for future CMOS technology nodes.
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Author : Han Zhao
Publisher :
ISBN 13 :
Total Pages : 244 pages
Book Rating : 4.:/5 (7 download)
Download or read book A Study of Electrical and Material Characteristics of III-V MOSFETs and TFETs with High-[kappa] Gate Dielectrics written by Han Zhao and published by . This book was released on 2010 with total page 244 pages. Available in PDF, EPUB and Kindle. Book excerpt: The performance and power scaling of metal-oxide-semiconductor field-effect-transistors (MOSFETs) has been historically achieved through shrinking the gate length of transistors for over three decades. As Si complementary metal-oxide-semiconductor (CMOS) scaling is approaching the physical and optical limits, the emerging technology involves new materials for the gate dielectrics and the channels as well as innovative structures. III-V materials have much higher electron mobility compared to Si, which can potentially provide better device performance. Hence, there have been tremendous research activities to explore the prospects of III-V materials for CMOS applications. Nevertheless, the key challenges for III-V MOSFETs with high-[kappa] oxides such as the lack of high quality, thermodynamically stable insulators that passivate the gate oxide/III-V interface still hinder the development of III-V MOS devices. The main focus of this dissertation is to develop the proper processes and structures for III-V MOS devices that result in good interface quality and high device performance. Firstly, fabrication processes and device structures of surface channel MOSFETs were investigated. The interface quality of In[subscript 0.53]Ga[subscript 0.47]As MOS devices was improved by developing the gate-last process with more than five times lower interface trap density (D[subscript it]) compared to the ones with the gate-first process. Furthermore, the optimum substrate structure was identified for inversion-type In[subscript 0.53]Ga[subscript 0.47]As MOSFETs by investigating the effects of channel doping concentration and thickness on device performance. With the proper process and channel structures, the first inversion-type enhancement-mode In[subscript 0.53]Ga[subscript 0.47]As MOSFETs with equivalent oxide thickness (EOT) of ~10 Å using atomic layer deposited (ALD) HfO2 gate dielectric were demonstrated. The second part of the study focuses on buried channel InGaAs MOSFETs. Buried channel InGaAs MOSFETs were fabricated to improve the channel mobility using various barriers schemes such as single InP barrier with different thicknesses and InP/InAlAs double-barrier. The impacts of different high-[kappa] dielectrics were also evaluated. It has been found that the key factors enabling mobility improvement at both peak and high-field mobility in In[subscript 0.7]Ga[subscript 0.3]As quantum-well MOSFETs with InP/InAlAs barrier-layers are 1) the epitaxial InP/InAlAs double-barrier confining carriers in the quantum-well channel and 2) good InP/Al2O3/HfO2 interface with small EOT. Record high channel mobility was achieved and subthreshold swing (SS) was greatly improved. Finally, InGaAs tunneling field-effect-transistors (TFETs), which are considered as the next-generation green transistors with ultra-low power consumption, were demonstrated with more than two times higher on-current while maintaining much smaller SS compared to the reported results. The improvements are believed to be due to using the In[subscript 0.7]Ga[subscript 0.3]As tunneling junction with a smaller bandgap and ALD HfO2 gate dielectric with a smaller EOT.
Author : Alexander Nichau
Publisher : Forschungszentrum Jülich
ISBN 13 : 3893368981
Total Pages : 199 pages
Book Rating : 4.8/5 (933 download)
Download or read book Characterization, integration and reliability of HfO2 and LaLuO3 high-κ/metal gate stacks for CMOS applications written by Alexander Nichau and published by Forschungszentrum Jülich. This book was released on 2014-04-03 with total page 199 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Kalyan Biswas
Publisher : John Wiley & Sons
ISBN 13 : 1394188951
Total Pages : 340 pages
Book Rating : 4.3/5 (941 download)
Download or read book Advanced Nanoscale MOSFET Architectures written by Kalyan Biswas and published by John Wiley & Sons. This book was released on 2024-05-29 with total page 340 pages. Available in PDF, EPUB and Kindle. Book excerpt: Comprehensive reference on the fundamental principles and basic physics dictating metal–oxide–semiconductor field-effect transistor (MOSFET) operation Advanced Nanoscale MOSFET Architectures provides an in-depth review of modern metal–oxide–semiconductor field-effect transistor (MOSFET) device technologies and advancements, with information on their operation, various architectures, fabrication, materials, modeling and simulation methods, circuit applications, and other aspects related to nanoscale MOSFET technology. The text begins with an introduction to the foundational technology before moving on to describe challenges associated with the scaling of nanoscale devices. Other topics covered include device physics and operation, strain engineering for highly scaled MOSFETs, tunnel FET, graphene based field effect transistors, and more. The text also compares silicon bulk and devices, nanosheet transistors and introduces low-power circuit design using advanced MOSFETs. Additional topics covered include: High-k gate dielectrics and metal gate electrodes for multi-gate MOSFETs, covering gate stack processing and metal gate modification Strain engineering in 3D complementary metal-oxide semiconductors (CMOS) and its scaling impact, and strain engineering in silicon–germanium (SiGe) FinFET and its challenges and future perspectives TCAD simulation of multi-gate MOSFET, covering model calibration and device performance for analog and RF applications Description of the design of an analog amplifier circuit using digital CMOS technology of SCL for ultra-low power VLSI applications Advanced Nanoscale MOSFET Architectures helps readers understand device physics and design of new structures and material compositions, making it an important resource for the researchers and professionals who are carrying out research in the field, along with students in related programs of study.
Author : Andrew M. Greene
Publisher :
ISBN 13 :
Total Pages : 179 pages
Book Rating : 4.:/5 (944 download)
Download or read book The Development of III-V Semiconductor MOSFETs for Future CMOS Applications written by Andrew M. Greene and published by . This book was released on 2015 with total page 179 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Donghyi Koh
Publisher :
ISBN 13 :
Total Pages : 174 pages
Book Rating : 4.:/5 (957 download)
Download or read book Advanced III-V MOSFET written by Donghyi Koh and published by . This book was released on 2016 with total page 174 pages. Available in PDF, EPUB and Kindle. Book excerpt: As scaling of silicon-based CMOS devices approaches its end, there is an ever increasing interest in high mobility materials. Among potential candidates for future CMOS devices, III-V materials are the most promising option due to their superior carrier transport properties. Despite their attractive material properties, they face several critical challenges that need to be resolved. The main limitation in III-V MOSFETs is lack of a good native oxide. Recently, devices utilizing a gate stack formed with high-[greek small letter kappa] and metal gate electrode are being explored for EOT scaling. Compared to Si MOSFETs, the surfaces of III-V channel materials are prone to deteriorate, resulting in degradation threshold voltage control, subthreshold characteristics, and overall device performance. The purpose of this dissertation is to address improvement of surface characteristics of III-V materials, especially, InGaAs. First of all, beryllium oxide (BeO) is considered as interface passivation layer for InGaAs MOSFETs. In order to apply BeO onto InGaAs, the chemical and mechanical properties are first studied. Liquid BeO precursor is never used in ALD systems. The chemical properties of ALD BeO film are revealed from AES, XPS, NRA, RBS, and REELS. Using nano-indentation, the mechanical characteristics of ALD BeO are investigated. The second part of the study focuses on the application of ALD BeO to InGaAs MOSFETs. The surface channel MOSFET is employed to understand BeO dielectric with III-V channel. The quantum well (QW) structure is known to withstand InGaAs intrinsic material properties from a device point of view. ALD BeO is applied to QW InGaAs MOSFETs as an interface passivation layer below HfO2. The impact of ALD BeO application for interface passivation is presented using the improvement in device characteristics, for example, drive current (ION), low leakage current (IOFF), effective mobility ([mu]eff), and interface trap density (Dit). The third and final part are about process research for InGaAs surface quality. III-V channel materials are inherent to create notorious native oxide that needs to be treated before the fabrication process. In order to protect pristine III-V surface, in-situ Ar treatment is studied and used before high-[greek small letter kappa] deposition. In addition, deuterium (D2) high-pressure annealing is considered to passivate III-V interface with high-[greek small letter kappa]. To demonstrate the efficacy of these treatment processes, InGaAs MOSCAPs are fabricated, and capacitance characteristics are analyzed and compared. The C-V hysteresis and multi-frequency C-V are measured, and the interface trap density (Dit) is extracted using the C-V result.
Author : Fei Xue
Publisher :
ISBN 13 :
Total Pages : 228 pages
Book Rating : 4.:/5 (859 download)
Download or read book III-V Metal-oxide-semiconductor Field-effect-transistors from Planar to 3D written by Fei Xue and published by . This book was released on 2013 with total page 228 pages. Available in PDF, EPUB and Kindle. Book excerpt: Si complementary metal-oxide-semiconductor (CMOS) technology has been prospered through continuously scaling of its feature size. As scaling is approaching its physical limitations, new materials and device structures are expected. High electron mobility III-V materials are attractive as alternative channel materials for future post-Si CMOS applications due to their outstanding transport property. High-k dielectrics/metal gate stack was applied to reduced gate leakage current and thus lower the power dissipation. Combining their benefits, great efforts have been devoted to explore III-V/high-k/metal metal-oxide-semiconductor field-effect-transistors (MOSFETs). The main challenges for III-V MOSFETs include interface issues of high-k/III-V, source and drain contact, silicon integration and reliability. A comprehensive study on III-V MOSFETs has been presented here focusing on three areas: 1) III-V/high-k/metal gate stack: material and electrical properties of various high-k dielectrics on III-V substrates have been systematically examined; 2) device architecture: device structures from planar surface channel MOSFETs and buried channel quantum well FETs (QWFETs) to 3D gate-wrapped-around FETs (GWAFETs) and tunneling FETs (TFETs) have been designed and analyzed; 3) fabrication process: process flow has been set up and optimized to build scaled planar and 3D devices with feature size down to 40nm. Potential of high performances have been demonstrated using novel III-V/high-k devices. Effective channel mobility was significantly improved by applying buried channel QWFET structure. Short channel effect control for sub-100nm devices was enhanced by shrinking gate dielectrics, reducing channel thickness and moving from 2D planar to 3D GWAFET structure. InGaAs TFETs have also been developed for ultra-low power application. This research work demonstrates that III-V/high-k/metal MOSFETs with superior device performances are promising candidates for future ultimately scaled logic devices.
Author : Peter Rodgers
Publisher : World Scientific
ISBN 13 : 9814466867
Total Pages : 367 pages
Book Rating : 4.8/5 (144 download)
Download or read book Nanoscience And Technology: A Collection Of Reviews From Nature Journals written by Peter Rodgers and published by World Scientific. This book was released on 2009-08-21 with total page 367 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book contains 35 review articles on nanoscience and nanotechnology that were first published in Nature Nanotechnology, Nature Materials and a number of other Nature journals. The articles are all written by leading authorities in their field and cover a wide range of areas in nanoscience and technology, from basic research (such as single-molecule devices and new materials) through to applications (in, for example, nanomedicine and data storage).
Author : R. Jacob Baker
Publisher : John Wiley & Sons
ISBN 13 : 0470229411
Total Pages : 1074 pages
Book Rating : 4.4/5 (72 download)
Download or read book CMOS written by R. Jacob Baker and published by John Wiley & Sons. This book was released on 2008 with total page 1074 pages. Available in PDF, EPUB and Kindle. Book excerpt: This edition provides an important contemporary view of a wide range of analog/digital circuit blocks, the BSIM model, data converter architectures, and more. The authors develop design techniques for both long- and short-channel CMOS technologies and then compare the two.
Author : Chenming Hu
Publisher : Woodhead Publishing
ISBN 13 : 9780081024010
Total Pages : 0 pages
Book Rating : 4.0/5 (24 download)
Download or read book Industry Standard FDSOI Compact Model BSIM-IMG for IC Design written by Chenming Hu and published by Woodhead Publishing. This book was released on 2019-05-22 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: Industry Standard FDSOI Compact Model BSIM-IMG for IC Design helps readers develop an understanding of a FDSOI device and its simulation model. It covers the physics and operation of the FDSOI device, explaining not only how FDSOI enables further scaling, but also how it offers unique possibilities in circuits. Following chapters cover the industry standard compact model BSIM-IMG for FDSOI devices. The book addresses core surface-potential calculations and the plethora of real devices and potential effects. Written by the original developers of the industrial standard model, this book is an excellent reference for the new BSIM-IMG compact model for emerging FDSOI technology. The authors include chapters on step-by-step parameters extraction procedure for BSIM-IMG model and rigorous industry grade tests that the BSIM-IMG model has undergone. There is also a chapter on analog and RF circuit design in FDSOI technology using the BSIM-IMG model.
Author : Athanasios Dimoulas
Publisher : Springer Science & Business Media
ISBN 13 : 354071491X
Total Pages : 397 pages
Book Rating : 4.5/5 (47 download)
Download or read book Advanced Gate Stacks for High-Mobility Semiconductors written by Athanasios Dimoulas and published by Springer Science & Business Media. This book was released on 2008-01-01 with total page 397 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a comprehensive monograph on gate stacks in semiconductor technology. It covers the major latest developments and basics and will be useful as a reference work for researchers, engineers and graduate students alike. The reader will get a clear view of what has been done so far, what is the state-of-the-art and which are the main challenges ahead before we come any closer to a viable Ge and III-V MOS technology.
Author : Muzaffer A. Siddiqi
Publisher : CRC Press
ISBN 13 : 143989373X
Total Pages : 385 pages
Book Rating : 4.4/5 (398 download)
Download or read book Dynamic RAM written by Muzaffer A. Siddiqi and published by CRC Press. This book was released on 2012-12-19 with total page 385 pages. Available in PDF, EPUB and Kindle. Book excerpt: Because of their widespread use in mainframes, PCs, and mobile audio and video devices, DRAMs are being manufactured in ever increasing volume, both in stand-alone and in embedded form as part of a system on chip. Due to the optimum design of their components—access transistor, storage capacitor, and peripherals—DRAMs are the cheapest and densest semiconductor memory currently available. As a result, most of DRAM structure research and development focuses on the technology used for its constituent components and their interconnections. However, only a few books are available on semiconductor memories in general and fewer on DRAMs. Dynamic RAM: Technology Advancements provides a holistic view of the DRAM technology with a systematic description of the advancements in the field since the 1970s, and an analysis of future challenges. Topics Include: DRAM cells of all types, including planar, three-dimensional (3-D) trench or stacked, COB or CUB, vertical, and mechanically robust cells using advanced transistors and storage capacitors Advancements in transistor technology for the RCAT, SCAT, FinFET, BT FinFET, Saddle and advanced recess type, and storage capacitor realizations How sub 100 nm trench DRAM technologies and sub 50 nm stacked DRAM technologies and related topics may lead to new research Various types of leakages and power consumption reduction methods in active and sleep mode Various types of SAs and yield enhancement techniques employing ECC and redundancy A worthwhile addition to semiconductor memory research, academicians and researchers interested in the design and optimization of high-density and cost-efficient DRAMs may also find it useful as part of a graduate-level course.
Author : Gennady Gildenblat
Publisher : Springer Science & Business Media
ISBN 13 : 9048186145
Total Pages : 531 pages
Book Rating : 4.0/5 (481 download)
Download or read book Compact Modeling written by Gennady Gildenblat and published by Springer Science & Business Media. This book was released on 2010-06-22 with total page 531 pages. Available in PDF, EPUB and Kindle. Book excerpt: Most of the recent texts on compact modeling are limited to a particular class of semiconductor devices and do not provide comprehensive coverage of the field. Having a single comprehensive reference for the compact models of most commonly used semiconductor devices (both active and passive) represents a significant advantage for the reader. Indeed, several kinds of semiconductor devices are routinely encountered in a single IC design or in a single modeling support group. Compact Modeling includes mostly the material that after several years of IC design applications has been found both theoretically sound and practically significant. Assigning the individual chapters to the groups responsible for the definitive work on the subject assures the highest possible degree of expertise on each of the covered models.
Author : Michel Houssa
Publisher : CRC Press
ISBN 13 : 1420034146
Total Pages : 614 pages
Book Rating : 4.4/5 (2 download)
Download or read book High k Gate Dielectrics written by Michel Houssa and published by CRC Press. This book was released on 2003-12-01 with total page 614 pages. Available in PDF, EPUB and Kindle. Book excerpt: The drive toward smaller and smaller electronic componentry has huge implications for the materials currently being used. As quantum mechanical effects begin to dominate, conventional materials will be unable to function at scales much smaller than those in current use. For this reason, new materials with higher electrical permittivity will be requ
Author : Howard Huff
Publisher : Springer Science & Business Media
ISBN 13 : 9783540210818
Total Pages : 740 pages
Book Rating : 4.2/5 (18 download)
Download or read book High Dielectric Constant Materials written by Howard Huff and published by Springer Science & Business Media. This book was released on 2005 with total page 740 pages. Available in PDF, EPUB and Kindle. Book excerpt: Issues relating to the high-K gate dielectric are among the greatest challenges for the evolving International Technology Roadmap for Semiconductors (ITRS). More than just an historical overview, this book will assess previous and present approaches related to scaling the gate dielectric and their impact, along with the creative directions and forthcoming challenges that will define the future of gate dielectric scaling technology. Topics include: an extensive review of Moore's Law, the classical regime for SiO2 gate dielectrics; the transition to silicon oxynitride gate dielectrics; the transition to high-K gate dielectrics (including the drive towards equivalent oxide thickness in the single-digit nanometer regime); and future directions and issues for ultimate technology generation scaling. The vision, wisdom, and experience of the team of authors will make this book a timely, relevant, and interesting, resource focusing on fundamentals of the 45 nm Technology Generation and beyond.
