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Author : Sharad C. Seth
Publisher :
ISBN 13 :
Total Pages : 102 pages
Book Rating : 4.F/5 ( download)
Download or read book Tutorial, Test Generation for VLSI Circuits written by Sharad C. Seth and published by . This book was released on 1987 with total page 102 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Vishwani D. Agrawal
Publisher : IEEE Computer Society Press
ISBN 13 :
Total Pages : 426 pages
Book Rating : 4.3/5 (91 download)
Download or read book Tutorial Test Generation for VLSI Chips written by Vishwani D. Agrawal and published by IEEE Computer Society Press. This book was released on 1988 with total page 426 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : M. Bushnell
Publisher : Springer Science & Business Media
ISBN 13 : 0306470403
Total Pages : 690 pages
Book Rating : 4.3/5 (64 download)
Download or read book Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits written by M. Bushnell and published by Springer Science & Business Media. This book was released on 2006-04-11 with total page 690 pages. Available in PDF, EPUB and Kindle. Book excerpt: The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers.
Author : Angela Krstic
Publisher : Springer Science & Business Media
ISBN 13 : 1461555973
Total Pages : 201 pages
Book Rating : 4.4/5 (615 download)
Download or read book Delay Fault Testing for VLSI Circuits written by Angela Krstic and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 201 pages. Available in PDF, EPUB and Kindle. Book excerpt: In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and methods for design and synthesis for testability. The authors of this book, Angela Krstic and Tim Cheng, have personally contributed to this research. Now they do an even greater service to the profession by collecting the work of a large number of researchers. In addition to expounding such a great deal of information, they have delivered it with utmost clarity. To further the reader's understanding many key concepts are illustrated by simple examples. The basic ideas of delay testing have reached a level of maturity that makes them suitable for practice. In that sense, this book is the best x DELAY FAULT TESTING FOR VLSI CIRCUITS available guide for an engineer designing or testing VLSI systems. Tech niques for path delay testing and for use of slower test equipment to test high-speed circuits are of particular interest.
Author : Paul H. Bardell
Publisher : Wiley-Interscience
ISBN 13 :
Total Pages : 376 pages
Book Rating : 4.3/5 (91 download)
Download or read book Built In Test for VLSI written by Paul H. Bardell and published by Wiley-Interscience. This book was released on 1987-10-20 with total page 376 pages. Available in PDF, EPUB and Kindle. Book excerpt: This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.
Author : Laung-Terng Wang
Publisher : Elsevier
ISBN 13 : 0080474799
Total Pages : 809 pages
Book Rating : 4.0/5 (84 download)
Download or read book VLSI Test Principles and Architectures written by Laung-Terng Wang and published by Elsevier. This book was released on 2006-08-14 with total page 809 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. - Most up-to-date coverage of design for testability. - Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. - Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
Author : Charles E. Stroud
Publisher : Springer Science & Business Media
ISBN 13 : 0306475049
Total Pages : 338 pages
Book Rating : 4.3/5 (64 download)
Download or read book A Designer’s Guide to Built-In Self-Test written by Charles E. Stroud and published by Springer Science & Business Media. This book was released on 2005-12-27 with total page 338 pages. Available in PDF, EPUB and Kindle. Book excerpt: A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test. This book is written from a designer's perspective and describes the major BIST approaches that have been proposed and implemented, along with their advantages and limitations.
Author : Hassan K. Reghbati
Publisher :
ISBN 13 :
Total Pages : 630 pages
Book Rating : 4.3/5 (91 download)
Download or read book Tutorial--VLSI Testing & Validation Techniques written by Hassan K. Reghbati and published by . This book was released on 1985 with total page 630 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Xinghao Chen
Publisher : Springer Science & Business Media
ISBN 13 : 1461313295
Total Pages : 151 pages
Book Rating : 4.4/5 (613 download)
Download or read book Efficient Branch and Bound Search with Application to Computer-Aided Design written by Xinghao Chen and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 151 pages. Available in PDF, EPUB and Kindle. Book excerpt: Branch-and-bound search has been known for a long time and has been widely used in solving a variety of problems in computer-aided design (CAD) and many important optimization problems. In many applications, the classic branch-and-bound search methods perform duplications of computations, or rely on the search decision trees which keep track of the branch-and-bound search processes. In CAD and many other technical fields, the computational cost of constructing branch-and-bound search decision trees in solving large scale problems is prohibitive and duplications of computations are intolerable. Efficient branch-and-bound methods are needed to deal with today's computational challenges. Efficient branch-and-bound methods must not duplicate computations. Efficient Branch and Bound Search with Application to Computer-Aided Design describes an efficient branch-and-bound method for logic justification, which is fundamental to automatic test pattern generation (ATPG), redundancy identification, logic synthesis, minimization, verification, and other problems in CAD. The method is called justification equivalence, based on the observation that justification processes may share identical subsequent search decision sequences. With justification equivalence, duplication of computations is avoided in the dynamic branch-and-bound search process without using search decision trees. Efficient Branch and Bound Search with Application to Computer-Aided Design consists of two parts. The first part, containing the first three chapters, provides the theoretical work. The second part deals with applications, particularly ATPG for sequential circuits. This book is particularly useful to readers who are interested in the design and test of digital circuits.
Author : S. Jayanthy
Publisher : Springer
ISBN 13 : 981132493X
Total Pages : 161 pages
Book Rating : 4.8/5 (113 download)
Download or read book Test Generation of Crosstalk Delay Faults in VLSI Circuits written by S. Jayanthy and published by Springer. This book was released on 2018-09-20 with total page 161 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.
Author : Rex Rice
Publisher :
ISBN 13 :
Total Pages : 474 pages
Book Rating : 4.3/5 (91 download)
Download or read book Tutorial, VLSI Support Technologies written by Rex Rice and published by . This book was released on 1982 with total page 474 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Giovanni DeMicheli
Publisher : Springer Science & Business Media
ISBN 13 : 9789024735624
Total Pages : 668 pages
Book Rating : 4.7/5 (356 download)
Download or read book Design systems for VLSI circuits written by Giovanni DeMicheli and published by Springer Science & Business Media. This book was released on 1987-07-31 with total page 668 pages. Available in PDF, EPUB and Kindle. Book excerpt: Proceedings of the NATO Advanced Study Institute, L'Aquila, Italy, July 7-18, 1986
Author : Yi Qian
Publisher : Elsevier
ISBN 13 : 0080555888
Total Pages : 577 pages
Book Rating : 4.0/5 (85 download)
Download or read book Information Assurance written by Yi Qian and published by Elsevier. This book was released on 2010-07-27 with total page 577 pages. Available in PDF, EPUB and Kindle. Book excerpt: In today’s fast paced, infocentric environment, professionals increasingly rely on networked information technology to do business. Unfortunately, with the advent of such technology came new and complex problems that continue to threaten the availability, integrity, and confidentiality of our electronic information. It is therefore absolutely imperative to take measures to protect and defend information systems by ensuring their security and non-repudiation. Information Assurance skillfully addresses this issue by detailing the sufficient capacity networked systems need to operate while under attack, and itemizing failsafe design features such as alarms, restoration protocols, and management configurations to detect problems and automatically diagnose and respond. Moreover, this volume is unique in providing comprehensive coverage of both state-of-the-art survivability and security techniques, and the manner in which these two components interact to build robust Information Assurance (IA). The first and (so far) only book to combine coverage of both security AND survivability in a networked information technology setting Leading industry and academic researchers provide state-of-the-art survivability and security techniques and explain how these components interact in providing information assurance Additional focus on security and survivability issues in wireless networks
Author : Mohammad Tehranipoor
Publisher : Springer Science & Business Media
ISBN 13 : 1441982973
Total Pages : 228 pages
Book Rating : 4.4/5 (419 download)
Download or read book Test and Diagnosis for Small-Delay Defects written by Mohammad Tehranipoor and published by Springer Science & Business Media. This book was released on 2011-09-08 with total page 228 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book will introduce new techniques for detecting and diagnosing small-delay defects in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise.
Author : Ian A. Grout
Publisher : Springer Science & Business Media
ISBN 13 : 9781846280238
Total Pages : 396 pages
Book Rating : 4.2/5 (82 download)
Download or read book Integrated Circuit Test Engineering written by Ian A. Grout and published by Springer Science & Business Media. This book was released on 2005-08-22 with total page 396 pages. Available in PDF, EPUB and Kindle. Book excerpt: Using the book and the software provided with it, the reader can build his/her own tester arrangement to investigate key aspects of analog-, digital- and mixed system circuits Plan of attack based on traditional testing, circuit design and circuit manufacture allows the reader to appreciate a testing regime from the point of view of all the participating interests Worked examples based on theoretical bookwork, practical experimentation and simulation exercises teach the reader how to test circuits thoroughly and effectively
Author : Debashis Bhattacharya
Publisher : Springer Science & Business Media
ISBN 13 : 1461315271
Total Pages : 168 pages
Book Rating : 4.4/5 (613 download)
Download or read book Hierarchical Modeling for VLSI Circuit Testing written by Debashis Bhattacharya and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 168 pages. Available in PDF, EPUB and Kindle. Book excerpt: Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated circuit technology. It is long been recognized that the testing prob lem can be alleviated by the use of higher-level methods in which multigate modules or cells are the primitive components in test generation; however, the development of such methods has proceeded very slowly. To be acceptable, high-level approaches should be applicable to most types of digital circuits, and should provide fault coverage comparable to that of traditional, low-level methods. The fault coverage problem has, perhaps, been the most intractable, due to continued reliance in the testing industry on the single stuck-line (SSL) fault model, which is tightly bound to the gate level of abstraction. This monograph presents a novel approach to solving the foregoing problem. It is based on the systematic use of multibit vectors rather than single bits to represent logic signals, including fault signals. A circuit is viewed as a collection of high-level components such as adders, multiplexers, and registers, interconnected by n-bit buses. To match this high-level circuit model, we introduce a high-level bus fault that, in effect, replaces a large number of SSL faults and allows them to be tested in parallel. However, by reducing the bus size from n to one, we can obtain the traditional gate-level circuit and models.
Author : Jose Moreira
Publisher : Artech House
ISBN 13 : 1608079864
Total Pages : 709 pages
Book Rating : 4.6/5 (8 download)
Download or read book An Engineer's Guide to Automated Testing of High-Speed Interfaces, Second Edition written by Jose Moreira and published by Artech House. This book was released on 2016-04-30 with total page 709 pages. Available in PDF, EPUB and Kindle. Book excerpt: This second edition of An Engineer's Guide to Automated Testing of High-Speed Interfaces provides updates to reflect current state-of-the-art high-speed digital testing with automated test equipment technology (ATE). Featuring clear examples, this one-stop reference covers all critical aspects of automated testing, including an introduction to high-speed digital basics, a discussion of industry standards, ATE and bench instrumentation for digital applications, and test and measurement techniques for characterization and production environment. Engineers learn how to apply automated test equipment for testing high-speed digital I/O interfaces and gain a better understanding of PCI-Express 4, 100Gb Ethernet, and MIPI while exploring the correlation between phase noise and jitter. This updated resource provides expanded material on 28/32 Gbps NRZ testing and wireless testing that are becoming increasingly more pertinent for future applications. This book explores the current trend of merging high-speed digital testing within the fields of photonic and wireless testing.
