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Monolithic Nyquist Rate Analog To Digital Converter With Digital Calibration
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Book Synopsis Monolithic Nyquist Rate Analog to Digital Converter with Digital Calibration by : Yang Wu
Download or read book Monolithic Nyquist Rate Analog to Digital Converter with Digital Calibration written by Yang Wu and published by . This book was released on 2002 with total page 264 pages. Available in PDF, EPUB and Kindle. Book excerpt: "The design details of pipeline ADC is also discussed in this work. Quantitative analyses have been provided in determining design parameters in various subsystems. The analyses ensure that a 10-bit resolution is achieved for the pipeline ADC. Both Flash ADC and pipeline ADC were implemented in a 0.25 mum and 0.18 mum CMOS process respectively, and results demonstrating their successful operation are presented." --
Book Synopsis Digital Calibration Algorithms for Nyquist-rate Analog to Digital Converters by : Anup Savla
Download or read book Digital Calibration Algorithms for Nyquist-rate Analog to Digital Converters written by Anup Savla and published by . This book was released on 2004 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: Continuous scaling down of CMOS device sizes and an accompanied increase in device switching speeds prompts the design of mixed-signal systems with increasingly complex digital signal processing and control algorithms accompanied by simpler analog circuitry. Analog to digital converter (ADC) is an essential mixed-signal component of modern receivers, where signals sensed from the source are converted to digital for further signal processing on them. In this dissertation, calibration techniques are presented which allow ADCs to be designed with large inherent gain and offset errors. The concept of arbitrary radix multistep conversion is presented, along with algorithms that enable reduced radix conversion with digital correction in pipelined or algorithmic ADCs. Calibration techniques that account for linear and nonlinear gain error are presented and adapted to the popular 1.5 bit/stage pipeline architecture. Calibration is performed purely with digital post-processing on ADC output bits, with no changes occurring in the analog hardware. In this dissertation a WCDMA/WLAN receiver architecture is presented and specifications are derived for all its components. Concept of reconfigurable ADC design is presented, which allows speed and power consumption optimization. Reduced radix digital correction, linear and nonlinear calibration and background-calibrating queues are presented and combined in two behavioral models. The reconfigurable ADC was fabricated in AMI0.5u 3V CMOS process, and achieved 55dB dynamic range at 45MS/s, consuming 51mW power. The reconfigured calibrated ADC was simulated in TSMC 0.18u 1.8V CMOS process, and achieved 63dB dynamic range at 25MS/s, consuming 3.6mW power. Measurements of the capture card showed a 1.6bit improvement in resolution with the use of calibration algorithms.
Book Synopsis Nyquist-rate Analog-to-digital Conversion with Calibration by : Bardia Pishdad
Download or read book Nyquist-rate Analog-to-digital Conversion with Calibration written by Bardia Pishdad and published by . This book was released on 2002 with total page 220 pages. Available in PDF, EPUB and Kindle. Book excerpt: "Analog-to-Digital Converter (ADC) microcircuits are required to meet stringent accuracy specifications in spite of their analog components' inherent nonidealities as well as the accuracy limitations due to fabrication technology. In this thesis, a 3-step Nyquist rate ADC is presented which makes use of bitstream processing to calibrate the digital-to-analog converter (DAC) and the residue amplifier, while using the same hardware to calibrate the sub-ADC. The system is designed to provide programmability and calibrate undesired circuit characteristics such as offset, gain error, and nonlinearity. Thus, the DAC can tolerate gain errors much higher than the standard amount, and has the potential to completely cancel nonlinearity and offsets in its transfer function. The offset of the residue amplifier can also be calibrated with this system. Moreover, the system eliminates the need for a reference ladder in the sub-ADC, and calibrates comparator offsets. Simulation and experimental results of the circuits fabricated in a 0.18mum CMOS process are presented." --
Book Synopsis Calibration Techniques in Nyquist A/D Converters by : Hendrik van der Ploeg
Download or read book Calibration Techniques in Nyquist A/D Converters written by Hendrik van der Ploeg and published by Springer Science & Business Media. This book was released on 2006-09-13 with total page 203 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book analyses different A/D-converter architectures with an emphasis on the maximum achievable power efficiency. It also provides an accessible overview of the state-of-the art in calibration techniques for Nyquist A/D converters. The calibration techniques presented are applicable to other analog-to-digital systems, such as those applied in integrated receivers. They allow implementation without introducing a speed or power penalty.
Book Synopsis Online Calibration of Nyquist-rate Analog-to-digital Converters by : Udaykiran Eduri
Download or read book Online Calibration of Nyquist-rate Analog-to-digital Converters written by Udaykiran Eduri and published by . This book was released on 2005 with total page 182 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Digitally Assisted Techniques for Nyquist Rate Analog-to-Digital Converters by : Rabeeh Majidi
Download or read book Digitally Assisted Techniques for Nyquist Rate Analog-to-Digital Converters written by Rabeeh Majidi and published by . This book was released on 2015 with total page 204 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: With the advance of technology and rapid growth of digital systems, low power high speed analog-to- digital converters with great accuracy are in demand. To achieve high effective number of bits Analog-to-Digital Converter (ADC) calibration as a time consuming process is a potential bottleneck for designs. This dissertation presentsa fully digital background calibration algorithm for a 7- bit redundant flash ADC using split structure and look-up table based correction. Redundant comparators are used in the flash ADC design of this work in order to tolerate large offset voltages while minimizing signal input capacitance. The split ADC structure helps by eliminating the unknown input signal from the calibration path. The flash ADC has been designed in 180nm IBM CMOS technology and fabricated through MOSIS. This work was supported by Analog Devices, Wilmington, MA. While much research on ADC design has concentrated on increasing resolution and sample rate, there are many applications (e.g. biomedical devices and sensor networks) that do not require high performance but do require low power energy efficient ADCs. This dissertation also explores on design of a low quiescent current 100k Sps Successive Approximation (SAR) ADC that has been used as an error detection ADC for an automotive application in 350nm CD (CMOS-DMOS) technology. This work was supported by ON Semiconductor Corp, East Greenwich, RI.
Book Synopsis Time-interleaved Analog-to-Digital Converters by : Simon Louwsma
Download or read book Time-interleaved Analog-to-Digital Converters written by Simon Louwsma and published by Springer Science & Business Media. This book was released on 2010-09-08 with total page 148 pages. Available in PDF, EPUB and Kindle. Book excerpt: Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.
Book Synopsis Digital Background Calibration of Analog-to-digital Converters Using a Calibration Queue by : Ozan Ersan Erdoğan
Download or read book Digital Background Calibration of Analog-to-digital Converters Using a Calibration Queue written by Ozan Ersan Erdoğan and published by . This book was released on 1999 with total page 250 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Low-Power High-Resolution Analog to Digital Converters by : Amir Zjajo
Download or read book Low-Power High-Resolution Analog to Digital Converters written by Amir Zjajo and published by Springer Science & Business Media. This book was released on 2010-10-29 with total page 311 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.
Book Synopsis Digital Calibration of a Switched-capacitor Delta-sigma Analog-to-digital Converter by : Keith Anthony O'Donoghue
Download or read book Digital Calibration of a Switched-capacitor Delta-sigma Analog-to-digital Converter written by Keith Anthony O'Donoghue and published by . This book was released on 2009 with total page 158 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Digital Calibration of Double-sampled Time-interleaved Analog-to-digital Converters by : Chi Ho Law
Download or read book Digital Calibration of Double-sampled Time-interleaved Analog-to-digital Converters written by Chi Ho Law and published by . This book was released on 2009 with total page 290 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Nyquist-Rate Switched-Capacitor Analog-to-Digital Converters by : Andreas John Inge Larsson
Download or read book Nyquist-Rate Switched-Capacitor Analog-to-Digital Converters written by Andreas John Inge Larsson and published by . This book was released on 2013 with total page 151 pages. Available in PDF, EPUB and Kindle. Book excerpt: The miniaturization and digitization of modern microelectronic systems have made Analog-to-Digital converters (ADC) key building components in many applications. Internet and entertainment technologies demand higher and higher performance from the hardware components in many communication and multimedia systems, but at the same time increased mobility demands less and less power consumption. Many applications, such as instrumentation, video, radar and communications, require very high accuracy and speed and with resolutions up to 16 bits and sampling rates in the 100s of MHz, pipelined ADCs are very suitable for such purposes. Resolutions above 10 bits often require very high power consumption and silicon area if no error correction technique is employed. Calibration relaxes the accuracy requirement of the individual building blocks of the ADC and enables power and area savings. Digital calibration is preferred over analog calibration due to higher robustness and accuracy. Furthermore, the microprocessors that process the digital information from the ADCs have constantly reduced cost and power consumption and improved performance due to technology scaling and innovative microprocessor architectures. The work in this dissertation presents a novel digital background calibration technique for high-speed, high-resolution pipelined ADCs. The technique is implemented in a 14 bit, 100 MS/s pipelined ADC fabricated in Taiwan Semiconductor Manufacturing Company (TSMC) 0.13 [mu]m Complementary Metal Oxide Semiconductor (CMOS) digital technology. The prototype ADC achieves better than 11.5 bits linearity at 100 MS/s and achieves a best-in-class figure of merit of 360 fJ/conversion-step. The core ADC has a power consumption of 105 mW and occupies an active area of 1.25 mm2. The work in this dissertation also presents a low-power, 8-bit algorithmic ADC. This ADC reduces power consumption at system level by minimizing voltage reference generation and ADC input capacitance. This ADC is implemented in International Business Machines Corporation (IBM) 90nm digital CMOS technology and achieves around 7.5 bits linearity at 0.25 MS/s with a power consumption of 300 [mu]W and an active area of 0.27 mm2. The electronic version of this dissertation is accessible from http://hdl.handle.net/1969.1/148307
Book Synopsis Novel Architecture of Analog to Digital Converter by : Narula Swina
Download or read book Novel Architecture of Analog to Digital Converter written by Narula Swina and published by . This book was released on 2023-02-28 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: A number of digital applications e.g. professional cameras, voice communication, video digitizers, data imaging and many more require low power, high speed, and high resolution analog to digital converters. But for high speed data communication systems with increased resolution and high sampling rates, different linear and nonlinear errors of ADCs come in picture which is a big challenge for design engineers to remove.A unique digital background calibration technique, a combination of signal dependent dithering with butterfly shuffler is proposed here for multi-bit, SHA-less 16-bit, 125 MS/s Pipelined ADC. The purpose of the research work was to integrate different stages of different sizes to achieve 16-bit error-free output at high sampling rate by using unique background calibration technique for SHA-less circuit. Because the achieved values of SNDR and SFDR are high with low power consumption, so this proposed ADC is suitable for high resolution applications like video communication. Without using sample and hold amplifier we saved power and reduced noise interference. Additional advantage of SHA removal is to use a smaller input sampling capacitor which increases ADC's drivability. A new timing diagram is also proposed here to resolve the sampling clock skew. The ultimate multi-bit front-end proposed here helped to save further power.The proposed comparator is able to avoid the kickback as compared to traditional comparators. For the initial multi-bit stage, a two-stage gain boosted amplifier is used to achieve high gain and to reduce the nonlinear gain errors. Because the non-idealities of Op-amp and capacitor mismatching errors, the ADC transfer function may achieve erroneous values by DNL errors, so the proposed technique is made capable to remove linear gain and offset errors and capacitor mismatching errors. Also the small signal linearity errors removed with the proposed architecture of 16-bit Pipelined ADC. Along with these advantages, high values of SNDR and SFDR has achieved, which is a top most indicator to distinguish the signal out from other noise and spurious frequencies.
Book Synopsis Reference-Free CMOS Pipeline Analog-to-Digital Converters by : Michael Figueiredo
Download or read book Reference-Free CMOS Pipeline Analog-to-Digital Converters written by Michael Figueiredo and published by Springer Science & Business Media. This book was released on 2012-08-24 with total page 189 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.
Book Synopsis Data Converters by : Franco Maloberti
Download or read book Data Converters written by Franco Maloberti and published by Springer Science & Business Media. This book was released on 2007-02-22 with total page 454 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book is the first graduate-level textbook presenting a comprehensive treatment of Data Converters. The advancement of digital electronics urged the availability of a still missing support for teaching and self-learning analog-digital interfaces at many levels: the specification, the conversion methods and architectures, the circuit design and the testing. This book, after the necessary study of the background theoretical elements, covers aspects and provide elements for a deep and comprehensive knowledge. The breath and the level of details of topics is enhanced by introductory material in each chapter and the use of many examples, most of them in the form of computer behavioral simulations. The examples and the end-of-chapter problems help in understanding and favor self-practice using tools that are effective for training and for design activity. Data Converters is a textbook that is also essential for engineering professionals as it was written for responding to a shortage of organically organized material on the topic. The book assumes a solid background in analog and digital circuits as well as a working knowledge of simulation tools for circuit and behavioral analysis. A background on statistical analysis is also helpful, though not strictly necessary. Coverage of all the basic elements essential for a clear understanding of sampling, quantization, noise in sampled-data systems and mathematical tools for sampled-data linear systems Comprehensive definition of the parameters used to specify data converters and necessary for understanding product data sheets Coverage of all the architectures used in Nyquist-rate data converters and detailed study of features, limits and design techniques Detailed study of oversampled and Sigma-Delta converters with simulation examples and use of spectra and histograms for a clear understanding of features and limit if the noise shaping Coverage of digital correction and calibration techniques for enhancing performances Use of theory and intuitive views to explain circuits and systems operation and limits Coverage of testing methods and description of the data processing used for testing and characterization Extensive use of Simulink and Matlab in examples and problem sets to assist reader comprehension and favor deeper study
Book Synopsis High-Speed Analog-to-Digital Conversion by : Michael J. Demler
Download or read book High-Speed Analog-to-Digital Conversion written by Michael J. Demler and published by Elsevier. This book was released on 2012-12-02 with total page 233 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book covers the theory and applications of high-speed analog-to-digital conversion. An analog-to-digital converter takes real-world inputs (such as visual images, temperature readings, and rates of speed) and transforms them into digital form for processing by computer. This book discusses the design and uses of such circuits, with particular emphasis on improving the speed of the conversion process and the accuracy of its output--how well the output is a corresponding digital representation of the output*b1input signal. As computers become increasingly interfaced to the outside world, "ADC" techniques will become ever more important.
Book Synopsis Analog-to-Digital Conversion by : Marcel J.M. Pelgrom
Download or read book Analog-to-Digital Conversion written by Marcel J.M. Pelgrom and published by Springer Science & Business Media. This book was released on 2010-07-24 with total page 469 pages. Available in PDF, EPUB and Kindle. Book excerpt: A book is like a window that allows you to look into the world. The window is shaped by the author and that makes that every window presents a unique view of the world. This is certainly true for this book. It is shaped by the topics and the projects throughout my career. Even more so, this book re?ects my own style of working and thinking. That starts already in Chap. 2. When I joined Philips Research in 1979, many of my colleagues used little paper notebooks to keep track of the most used equations and other practical things. This notebook was the beginning for Chap. 2: a collection of topics that form the basis for much of the other chapters. Chapter2 is not intended to explain these topics, but to refresh your knowledge and help you when you need some basics to solve more complex issues. In the chapters discussing the fundamental processes of conversion, you will r- ognize my preoccupation with mathematics. I really enjoy ?nding an equation that properly describes the underlying mechanism. Nevertheless mathematics is not a goalonitsown:theequationshelptounderstandthewaythevariablesareconnected to the result. Real insight comes from understanding the physics and electronics. In the chapters on circuit design I have tried to reduce the circuit diagrams to the s- plest form, but not simpler. . . I do have private opinions on what works and what should not be applied.
