Implementation of Novel Power Combining Techniques on Solid State Power Amplifier (SSPA) Chip Designs to Improve Efficiency and Power Performance

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ISBN 13 :
Total Pages : 342 pages
Book Rating : 4.:/5 (116 download)

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Book Synopsis Implementation of Novel Power Combining Techniques on Solid State Power Amplifier (SSPA) Chip Designs to Improve Efficiency and Power Performance by : Caroline W. Waiyaki

Download or read book Implementation of Novel Power Combining Techniques on Solid State Power Amplifier (SSPA) Chip Designs to Improve Efficiency and Power Performance written by Caroline W. Waiyaki and published by . This book was released on 2012 with total page 342 pages. Available in PDF, EPUB and Kindle. Book excerpt: Current communication systems at Ka-band are using traveling wave tube amplifiers (TWTAs) that are bulky, costly and require high-voltage power supplies. Advances on solid state device technologies with benefits such as low supply voltage, graceful degradation, lower development cost, and high power densities have made solid state power amplifiers (SSPAs) very attractive as TWTA replacements. These attributes are beneficial to the military's need for reducing size, weight, and prime power (SWAP) and cost of the existing electronic components. The Gallium Arsenide (GaAs) device technology has been the workhorse of the solid state power amplifiers (SSPAs) for the last two decades and has demonstrated maturity at the Ka-band frequencies. Gallium Nitride (GaN), though less mature, is increasingly becoming the technology of choice for high frequency, high power applications due to its desirable attributes (i.e. high breakdown fields, high power density, and high electron saturation velocity). The SSPA modules currently available at Ka-band are based on GaAs device technology and utilize very low power (2W) and less efficient (20% power added efficiency (PAE)) monolithic microwave integrated circuits (MMICs). There is a need to improve the power and efficiency of current MMICs by incorporating on-chip planar power combining. This research focuses on the design of a highly efficient multi-watt SSPA chip at Ka-band for space, defense and commercial wireless communications applications. GaAs- and GaN- based device technologies are utilized in this research to demonstrate the feasibility of achieving multi-watt PAs with 40% PAE at Ka-band. Class AB biasing has been chosen for the design to obtain a good compromise between linearity and efficiency performances. Additionally, a novel planar power combining network that incorporates harmonic suppression, Wei-Chi, is implemented in the chip design to improve on the power and efficiency performance without degrading linearity performance. This Wei-Chi combiner performance is also compared to the Wilkinson combiner, which is commonly used in MMIC design. S-band GaN-based microwave integrated circuits (MICs) using Cree's 10W GaN HEMT packaged devices were designed to verify the feasibility of the approach. The MMIC designs for this work included a GaAs-based chip using Triquint's 0.13&mgr;m pHEMT process and a GaN-based chip on Triquint's 0.15&mgr;m GaN on SiC HEMT process. Both designs implemented the Wei-Chi combiner at Ka-band. The GaAs MMIC design has demonstrated measured output power of 22 dBm and 39.32 % PAE at 26.5 GHz. In addition, the simulated results for the GaN MMIC design are presented in this research. The GaN MMIC is expected to deliver 2W output power with 40% PAE. -- Abstract.

High Efficiency RF and Microwave Solid State Power Amplifiers

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Publisher : John Wiley & Sons
ISBN 13 : 9780470746554
Total Pages : 514 pages
Book Rating : 4.7/5 (465 download)

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Book Synopsis High Efficiency RF and Microwave Solid State Power Amplifiers by : Paolo Colantonio

Download or read book High Efficiency RF and Microwave Solid State Power Amplifiers written by Paolo Colantonio and published by John Wiley & Sons. This book was released on 2009-07-08 with total page 514 pages. Available in PDF, EPUB and Kindle. Book excerpt: Do you want to know how to design high efficiency RF and microwave solid state power amplifiers? Read this book to learn the main concepts that are fundamental for optimum amplifier design. Practical design techniques are set out, stating the pros and cons for each method presented in this text. In addition to novel theoretical discussion and workable guidelines, you will find helpful running examples and case studies that demonstrate the key issues involved in power amplifier (PA) design flow. Highlights include: Clarification of topics which are often misunderstood and misused, such as bias classes and PA nomenclatures. The consideration of both hybrid and monolithic microwave integrated circuits (MMICs). Discussions of switch-mode and current-mode PA design approaches and an explanation of the differences. Coverage of the linearity issue in PA design at circuit level, with advice on low distortion power stages. Analysis of the hot topic of Doherty amplifier design, plus a description of advanced techniques based on multi-way and multi-stage architecture solutions. High Efficiency RF and Microwave Solid State Power Amplifiers is: an ideal tutorial for MSc and postgraduate students taking courses in microwave electronics and solid state circuit/device design; a useful reference text for practising electronic engineers and researchers in the field of PA design and microwave and RF engineering. With its unique unified vision of solid state amplifiers, you won’t find a more comprehensive publication on the topic.

CMOS 60-GHz and E-band Power Amplifiers and Transmitters

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Publisher : Springer
ISBN 13 : 3319188399
Total Pages : 188 pages
Book Rating : 4.3/5 (191 download)

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Book Synopsis CMOS 60-GHz and E-band Power Amplifiers and Transmitters by : Dixian Zhao

Download or read book CMOS 60-GHz and E-band Power Amplifiers and Transmitters written by Dixian Zhao and published by Springer. This book was released on 2015-06-29 with total page 188 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book focuses on the development of design techniques and methodologies for 60-GHz and E-band power amplifiers and transmitters at device, circuit and layout levels. The authors show the recent development of millimeter-wave design techniques, especially of power amplifiers and transmitters, and presents novel design concepts, such as “power transistor layout” and “4-way parallel-series power combiner”, that can enhance the output power and efficiency of power amplifiers in a compact silicon area. Five state-of-the-art 60-GHz and E-band designs with measured results are demonstrated to prove the effectiveness of the design concepts and hands-on methodologies presented. This book serves as a valuable reference for circuit designers to develop millimeter-wave building blocks for future 5G applications.

Design and Implementation of 60 GHz CMOS Power Amplifiers

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Publisher :
ISBN 13 :
Total Pages : 164 pages
Book Rating : 4.:/5 (956 download)

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Book Synopsis Design and Implementation of 60 GHz CMOS Power Amplifiers by : Payam Masoumi Farahabadi

Download or read book Design and Implementation of 60 GHz CMOS Power Amplifiers written by Payam Masoumi Farahabadi and published by . This book was released on 2016 with total page 164 pages. Available in PDF, EPUB and Kindle. Book excerpt: The availability of an unlicensed 7 GHz bandwidth around 60 GHz offers great potential for establishment of high-data-rate short-range wireless communication links. Although previously left unutilized, recent advances in electronics enable the development of wireless transceivers at millimeter-wave frequencies. Despite offering a large bandwidth, the high signal attenuation caused by oxygen absorption in 60 GHz band requires the wireless transmitters to transmit signals with power as large as 27 dBm, so the receivers can detect greatly attenuated signals. Therefore, the design of power amplifiers capable of generating such large output powers proves to be a major challenge in the development of 60 GHz wireless transceivers, especially if CMOS technology is chosen for implementation of fully integrated 60 GHz wireless systems. In this dissertation, we present new architectures for power combining transformers, as well as new circuit topologies to improve the performance of 60 GHz power amplifiers implemented in CMOS technology. Although CMOS offers a higher level of integration and lower fabrication cost compared to high-speed compound semiconductor technologies, low supply and breakdown voltages, as well as operation near cutoff frequencies of MOSFETs make the design of power amplifier extremely challenging. Optimization of the efficiency/power performance of CMOS power amplifiers operating at millimeter-wave frequencies requires novelty in the design of active/passive structures. An overview on the technological advances and the challenges in millimeter-wave CMOS power amplifiers is presented by comparing previously reported active/passive power combination techniques. A comprehensive analysis and modeling of the matching circuits and on-chip spiral transformers are developed in order to estimate the passive power efficiency of the coupling circuits and power combining transformers. A new area-efficient power-combining configuration is proposed to achieve a high output power per occupied area. A 60 GHz power amplifier is fabricated utilizing the new combining technique with a measured output power of 18.8 dBm. Second we propose a new circuit topology to enable the capability of dual-mode operation. Also, a new enhancement technique is utilized in order to improve the gain-bandwidth product of cascode gain stages. Fabricated in 65 nm technology, the 60 GHz power amplifier could achieve measured maximum power added efficiency of 17.2% while delivering 18.1 dBm output power. Finally, we explore the utilization of a new dual-mode technique in a distributed active transformer power amplifier. A new power amplifier circuit topology and a new DAT layout technique is proposed in order to improve the power added efficiency and output power simultaneously. Fabricated in 65nm CMOS technology, the maximum measured gain of the 60 GHz power amplifier is 22 dB within a wide 3dB bandwidth of 14 GHz. A maximum saturated output power of 19.7 dBm is measured in high-power mode while a high power added efficiency of 25% is achieved.

Millimeter-Wave Power Amplifiers

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Publisher : Springer
ISBN 13 : 3319621661
Total Pages : 367 pages
Book Rating : 4.3/5 (196 download)

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Book Synopsis Millimeter-Wave Power Amplifiers by : Jaco du Preez

Download or read book Millimeter-Wave Power Amplifiers written by Jaco du Preez and published by Springer. This book was released on 2017-10-05 with total page 367 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a detailed review of millimeter-wave power amplifiers, discussing design issues and performance limitations commonly encountered in light of the latest research. Power amplifiers, which are able to provide high levels of output power and linearity while being easily integrated with surrounding circuitry, are a crucial component in wireless microwave systems. The book is divided into three parts, the first of which introduces readers to mm-wave wireless systems and power amplifiers. In turn, the second focuses on design principles and EDA concepts, while the third discusses future trends in power amplifier research. The book provides essential information on mm-wave power amplifier theory, as well as the implementation options and technologies involved in their effective design, equipping researchers, circuit designers and practicing engineers to design, model, analyze, test and implement high-performance, spectrally clean and energy-efficient mm-wave systems.

Linearization and Efficiency Enhancement Techniques for Silicon Power Amplifiers

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Publisher : Elsevier
ISBN 13 : 0124186815
Total Pages : 163 pages
Book Rating : 4.1/5 (241 download)

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Book Synopsis Linearization and Efficiency Enhancement Techniques for Silicon Power Amplifiers by : Eric Kerhervé

Download or read book Linearization and Efficiency Enhancement Techniques for Silicon Power Amplifiers written by Eric Kerhervé and published by Elsevier. This book was released on 2015-01-07 with total page 163 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides an overview of current efficiency enhancement and linearization techniques for silicon power amplifier designs. It examines the latest state of the art technologies and design techniques to address challenges for RF cellular mobile, base stations, and RF and mmW WLAN applications. Coverage includes material on current silicon (CMOS, SiGe) RF and mmW power amplifier designs, focusing on advantages and disadvantages compared with traditional GaAs implementations. With this book you will learn: The principles of linearization and efficiency improvement techniques The architectures allowing the optimum design of multimode Si RF and mmW power amplifiers How to make designs more efficient by employing new design techniques such as linearization and efficiency improvement Layout considerations Examples of schematic, layout, simulation and measurement results Addresses the problems of high power generation, faithful construction of non-constant envelope constellations, and efficient and well control power radiation from integrated silicon chips Demonstrates how silicon technology can solve problems and trade-offs of power amplifier design, including price, size, complexity and efficiency Written and edited by the top contributors to the field

Low Power Methodology Manual

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Publisher : Springer Science & Business Media
ISBN 13 : 0387718192
Total Pages : 303 pages
Book Rating : 4.3/5 (877 download)

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Book Synopsis Low Power Methodology Manual by : David Flynn

Download or read book Low Power Methodology Manual written by David Flynn and published by Springer Science & Business Media. This book was released on 2007-07-31 with total page 303 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a practical guide for engineers doing low power System-on-Chip (SoC) designs. It covers various aspects of low power design from architectural issues and design techniques to circuit design of power gating switches. In addition to providing a theoretical basis for these techniques, the book addresses the practical issues of implementing them in today's designs with today's tools.

Partitioning Design Approach for the Reliable Design of Highly Efficient RF Power Amplifiers

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Publisher : kassel university press GmbH
ISBN 13 : 373760388X
Total Pages : 190 pages
Book Rating : 4.7/5 (376 download)

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Book Synopsis Partitioning Design Approach for the Reliable Design of Highly Efficient RF Power Amplifiers by : Roshanak Lehna

Download or read book Partitioning Design Approach for the Reliable Design of Highly Efficient RF Power Amplifiers written by Roshanak Lehna and published by kassel university press GmbH. This book was released on 2017-11-13 with total page 190 pages. Available in PDF, EPUB and Kindle. Book excerpt: The modern wireless communication systems require modulated signals with wide modulation bandwidth. This, in turns, requires signals with very high dynamic range and peak-to-average power ratio (PAPR). This means that the amplifier in the base-station has to work at a power back-off as large as the dynamic range of the signal, so that the amplifier has a high linearity in this region. For the standard single-stage amplifiers, this large power back-off reduces the efficiency dramatically. In this work, a three-way Doherty power amplifier (DPA) aiming at high power efficiency within a dynamic range of 9.5 dB, is designed and fabricated using partitioning design approach. The partitioning design approach decomposes a complex design task into small-sized, well-controllable, and verifiable subcircuits. This advanced straight forward method has shown very promising results. Using this design approach, a three-way DPA has been designed to demonstrate the advantages of this reliable design technique as well. Based on the design of a single-stage power amplifier and proposing a novel output power combiner, a 6 W three-way DPA has been designed which allows the mandatory load modulation principle in three-way DPA structures to be realized with simpler elements, whereas the design of a standard Doherty combiner would have been very challenging and not practical due to the extremely small value of its characteristic line impedance. The proposed combiner is calculated for a three-way DPA with 2-mm AlGaN/GaN-HEMTs. The simulation result shows a very good load modulation for the amplifier, which confirms the theoretical expectation for a three-way DPA. The efficiency of the designed 6 W three-way DPA at large back-off shows very promising values compared to recently reported amplifiers. The measured IMD3 products confirm the good linearity of the amplifier as well. Accordingly, the proposed power combiner and the design strategy are recommended to be used as the preferred option for designing three-way DPA structures with very high output power.

Design of Silicon Power Ampliers and Arrays for Millimeter Wave Applications

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Publisher :
ISBN 13 : 9781321451825
Total Pages : 115 pages
Book Rating : 4.4/5 (518 download)

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Book Synopsis Design of Silicon Power Ampliers and Arrays for Millimeter Wave Applications by : Bassel Hanafi

Download or read book Design of Silicon Power Ampliers and Arrays for Millimeter Wave Applications written by Bassel Hanafi and published by . This book was released on 2014 with total page 115 pages. Available in PDF, EPUB and Kindle. Book excerpt: With emerging millimeter wave applications including automotive radars, wireless transmission of high-definition content, and possibly 5G mobile communications, low cost and high performance power amplifiers are key for enabling a commercial mass market. Silicon technologies offer cost advantages but typically suffer from low breakdown voltage and low Q passive elements yielding low power density and low efficiency. This thesis presents millimeter wave power amplifiers implemented in main stream silicon technologies. The task of obtaining large output power from low breakdown silicon devices is addressed by the use of stacking and power combining techniques. The design of a Q-band amplifier implemented in IBM 0.13um SiGe HBT process featuring on-chip corporate combining is first described. Stacking of bipolar transistors is introduced, together with novel low impedance biasing circuits to enable high breakdown voltage while extending the output swings. The fabricated amplifier delivered 24.7 dBm of maximum output power at 39 GHz, and 6.5% efficiency at 5.2 V without degradation. Alternatively, free-space combining can eliminate lossy on-chip combiners allowing for higher power and efficiency. A chip of 8 unit amplifiers implemented in 45nm CMOS SOI feeding a 2x2 array of differentially-fed patch antennas is demonstrated. With this chip, using CMOS stacking techniques, high output power (28 dBm) was achieved from a 3-stage amplifier operating at 45 GHz. When coupled to the antennas, the array provided an equivalent isotropic radiated power (EIRP) of 40 dBm (10 W), and a larger system comprising 4 chips feeding a 2x8 array was shown to deliver an EIRP of 50 dBm (100 W) at 45 GHz, while demonstrating, for the first time, a total RF power of 33 dBm which is a record in silicon at this frequency. The estimated peak PAE for both arrays are 13.5% and 10.7%, respectively. Finally, power amplifiers implemented in SOI technology can suffer from severe self-heating. The thermal behavior of CMOS SOI PAs is evaluated using 3D thermal simulations, and the effects of the back-end interconnect as well as the layout on the overall thermal resistance are discussed. The models were verified against measurements for an individual FET using the output conductance method. For a stacked-FET PA fabricated in 45nm CMOS SOI, the models reveal an excessive temperature rise of 150C for the FETs at maximum power, hence simple ideas were proposed to improve the thermal resistance of SOI circuits, with limited impact on electrical performance.

A Ka-Band Wide-Bandgap Solid-State Power Amplifier

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Author :
Publisher : Createspace Independent Publishing Platform
ISBN 13 : 9781721816996
Total Pages : 32 pages
Book Rating : 4.8/5 (169 download)

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Book Synopsis A Ka-Band Wide-Bandgap Solid-State Power Amplifier by : National Aeronautics and Space Administration (NASA)

Download or read book A Ka-Band Wide-Bandgap Solid-State Power Amplifier written by National Aeronautics and Space Administration (NASA) and published by Createspace Independent Publishing Platform. This book was released on 2018-06-24 with total page 32 pages. Available in PDF, EPUB and Kindle. Book excerpt: Motivated by recent advances in wide-bandgap (WBG) gallium nitride (GaN) semiconductor technology, there is considerable interest in developing efficient solidstate power amplifiers (SSPAs) as an alternative to the traveling-wave tube amplifier (TWTA) for space applications. This article documents the results of a study to investigate power-combining technology and SSPA architectures that can enable a 120-W, 40 percent power-added efficiency (PAE) SSPA. Results of the study indicate that architectures based on at least three power combiner designs are likely to enable the target SSPA. The proposed architectures can power combine 16 to 32 individual monolithic microwave integrated circuits (MMICs) with >80 percent combining efficiency. This corresponds to MMIC requirements of 5- to 10-W output power and >48 percent PAE. For the three proposed architectures [1], detailed analysis and design of the power combiner are presented. The first architecture studied is based on a 16-way septum combiner that offers low loss and high isolation over the design band of 31 to 36 GHz. Analysis of a 2-way prototype septum combiner had an input match >25 dB, output match >30 dB, insertion loss 30 dB over the design band. A 16-way design, based on cascading this combiner in a binary fashion, is documented. The second architecture is based on a 24-way waveguide radial combiner. A prototype 24-way radial base was analyzed to have an input match >30 dB (under equal excitation of all input ports). The match of the mode transducer that forms the output of a radial combiner was found to be >27 dB. The functional bandwidth of the radial base and mode transducer, which together will form a radial combiner/divider, exceeded the design band. The third architecture employs a 32-way, parallel-plate radial combiner. Simulation results indicated an input match >24 dB, output match >22 dB, insertion loss

High Performance Power Amplifiers Utilizing Novel Balun Design Techniques

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Publisher :
ISBN 13 : 9781303154720
Total Pages : pages
Book Rating : 4.1/5 (547 download)

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Book Synopsis High Performance Power Amplifiers Utilizing Novel Balun Design Techniques by : Alexander Nicholas Stameroff

Download or read book High Performance Power Amplifiers Utilizing Novel Balun Design Techniques written by Alexander Nicholas Stameroff and published by . This book was released on 2013 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: In this PhD. research, a new power amplifier architecture is introduced. This work develops the push-pull architecture into a multifunctional matching network and combiner to create a high power, high efficiency, linear power amplifier (PA) that operates over a wide bandwidth. The traditional push-pull architecture uses an input balun to split a single ended signal into a differential signal, amplify it, and recombine it. This new technique realizes this architecture as a planar, hybrid, PA in X band. The first contribution of this work is the development of planar Marchand baluns that operate over a wide bandwidth. An analysis technique is developed and broadside coupled, Marchand baluns in an inhomogeneous medium are employed. These baluns operate over a bandwidth from 5 to 26 GHz with amplitude and phase imbalances less than 0.5 dB and 5°, respectively. The even and odd mode behavior of the Marchand balun is utilized to provide harmonic matching for the PA. The balun inherently presents an open circuit to common mode signals at its center frequency. This is utilized to match the second harmonic to an open circuit condition. A band-stop filter is used as a harmonic trap to match the third harmonic to a short circuit. This achieves inverse class F matching for high efficiency operation. This network simultaneously acts as a combiner and matching network for high power and efficiency. A prototype PA was fabricated to prove this concept and achieves a saturated output power, Psat, greater than 33 dBm and a power added efficiency, PAE, greater than 62% over the bandwidth from 9.7 to 10.3 GHz.This technique was refined to operate over a wide bandwidth. The harmonic trap was removed and the out-of-band behavior of the balun was used to provide the short circuit matching at the third harmonic. A prototype PA was fabricated that achieved a 1 dB compressed power, P1dB, and PAE greater than 40 dBm and 55% respectively over the band from 8 to 12 GHz. Finally, the technique was extended to combine power from four transistors by the development of a 4-to-1 balun. A prototype PA was fabricated to prove this concept and achieves a P1dB and PAE greater than 43 dBm and 55% over the band from 8 to 12 GHz.

Ka-Band Wide-Bandgap Solid-State Power Amplifier

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Publisher : Createspace Independent Publishing Platform
ISBN 13 : 9781721816668
Total Pages : 36 pages
Book Rating : 4.8/5 (166 download)

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Book Synopsis Ka-Band Wide-Bandgap Solid-State Power Amplifier by : National Aeronautics and Space Administration (NASA)

Download or read book Ka-Band Wide-Bandgap Solid-State Power Amplifier written by National Aeronautics and Space Administration (NASA) and published by Createspace Independent Publishing Platform. This book was released on 2018-06-24 with total page 36 pages. Available in PDF, EPUB and Kindle. Book excerpt: Motivated by recent advances in wide-bandgap (WBG) gallium nitride (GaN) semiconductor technology, there is considerable interest in developing efficient solid-state power amplifiers (SSPAs) as an alternative to the traveling-wave tube amplifier (TWTA) for space applications. This article documents proof-of-concept hardware used to validate power-combining technologies that may enable a 120-W, 40 percent power-added efficiency (PAE) SSPA. Results in previous articles [1-3] indicate that architectures based on at least three power combiner designs are likely to enable the target SSPA. Previous architecture performance analyses and estimates indicate that the proposed architectures can power combine 16 to 32 individual monolithic microwave integrated circuits (MMICs) with >80 percent combining efficiency. This combining efficiency would correspond to MMIC requirements of 5- to 10-W output power and >48 percent PAE. In order to validate the performance estimates of the three proposed architectures, measurements of proof-of-concept hardware are reported here. Epp, L. and Khan, P. and Silva, A. Glenn Research Center; Jet Propulsion Laboratory IPN-PR-42-163

International Aerospace Abstracts

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Publisher :
ISBN 13 :
Total Pages : 898 pages
Book Rating : 4.F/5 ( download)

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Book Synopsis International Aerospace Abstracts by :

Download or read book International Aerospace Abstracts written by and published by . This book was released on 1994 with total page 898 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Power Aware Design Methodologies

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Publisher : Springer Science & Business Media
ISBN 13 : 0306481391
Total Pages : 533 pages
Book Rating : 4.3/5 (64 download)

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Book Synopsis Power Aware Design Methodologies by : Massoud Pedram

Download or read book Power Aware Design Methodologies written by Massoud Pedram and published by Springer Science & Business Media. This book was released on 2007-05-08 with total page 533 pages. Available in PDF, EPUB and Kindle. Book excerpt: Power Aware Design Methodologies was conceived as an effort to bring all aspects of power-aware design methodologies together in a single document. It covers several layers of the design hierarchy from technology, circuit logic, and architectural levels up to the system layer. It includes discussion of techniques and methodologies for improving the power efficiency of CMOS circuits (digital and analog), systems on chip, microelectronic systems, wirelessly networked systems of computational nodes and so on. In addition to providing an in-depth analysis of the sources of power dissipation in VLSI circuits and systems and the technology and design trends, this book provides a myriad of state-of-the-art approaches to power optimization and control. The different chapters of Power Aware Design Methodologies have been written by leading researchers and experts in their respective areas. Contributions are from both academia and industry. The contributors have reported the various technologies, methodologies, and techniques in such a way that they are understandable and useful.

Ka-Band Wide-Bandgap Solid-State Power Amplifier

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Author :
Publisher : Createspace Independent Publishing Platform
ISBN 13 : 9781721818310
Total Pages : 32 pages
Book Rating : 4.8/5 (183 download)

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Book Synopsis Ka-Band Wide-Bandgap Solid-State Power Amplifier by : National Aeronautics and Space Administration (NASA)

Download or read book Ka-Band Wide-Bandgap Solid-State Power Amplifier written by National Aeronautics and Space Administration (NASA) and published by Createspace Independent Publishing Platform. This book was released on 2018-06-24 with total page 32 pages. Available in PDF, EPUB and Kindle. Book excerpt: Results of prototype hardware activities related to a 120-W, 32-GHz (Ka-band) solid-state power amplifier (SSPA) architecture study are presented. Spurious mode suppression and the power-handling capability of a prototype 24-way radial combiner and a prototype 2-way septum binary combiner were investigated. Experimental data indicate that a commercial absorptive filter, designed to pass the circular TE01 mode, effectively suppressed the higher-order modes generated by a narrowband, flower-petal-type mode transducer. However, the same filter was not effective in suppressing higher-order modes generated by the broadband Marie mode transducer that is used in the prototype waveguide radial combiner. Should greater filtering be required by a particular SSPA application, a broadband mode filter that can suppress specifically those higher-order modes that are generated by the Marie transducer will need to be developed. A back-to-back configuration of the prototype radial combiner was tested with drive power up to approximately 50 W. No anomalous behavior was observed. Power measurements of the septum combiner indicate that up to 10-W radio frequency (RF) can be dissipated in the integrated resistive element before a permanent performance shift is observed. Thus, a given adder (a single-stage, 2-way combiner) can safely combine two 20-W sources, and the adder will not be damaged in the event of a source failure. This result is used to calculate the maximum source power that can be safely combined as a function of the number of sources combined and the number of source failures allowed in a multi-stage combiner. The analysis shows that SSPA power >140 W can be generated by power combining 16 sources producing 10 W each. In this configuration, up to three sources could fail with the guarantee that the combiner would not be damaged. Finally, a modified prototype septum combiner design was verified. The improved design reduced the assembly time from over 2 hours to about 15

Power-Combining Techniques for Millimeter-wave Silicon Power Amplifiers

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Publisher :
ISBN 13 :
Total Pages : 152 pages
Book Rating : 4.:/5 (1 download)

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Book Synopsis Power-Combining Techniques for Millimeter-wave Silicon Power Amplifiers by : Jefy Alex Jayamon

Download or read book Power-Combining Techniques for Millimeter-wave Silicon Power Amplifiers written by Jefy Alex Jayamon and published by . This book was released on 2017 with total page 152 pages. Available in PDF, EPUB and Kindle. Book excerpt: Emerging millimeter-wave applications, including high speed wireless communication using 5G standards, favor silicon technologies, both CMOS and SiGe, for transceiver design, due to the high level of integration at reduced cost and availability of high speed transistors. Efficient, linear and reliable high power amplifiers with broad bandwidth are needed at the transmitter front-ends to enable high data rate links at long distances. But the low breakdown voltage of CMOS FETs due to gate length scaling and other transistor non-idealities make the design of high power mm-wave amplifiers in deeply scaled CMOS nodes difficult. Circuit techniques like FET stacking provide a compact and efficient way of implementing high power mm-wave amplifiers reliably. Other power combining techniques such as on-chip and spatial power combining can be used along with FET stacking to achieve even higher output power levels. This thesis investigates the design of high power mm-wave power amplifiers at frequencies from 28 GHz to 94 GHz, using multiple power combining techniques. This work extends the use of FET stacking for high power PA design to 94 GHz. A 3-stack PA designed in 45 nm CMOS SOI with 17 dBm output power and 9% efficiency is presented. Using this PA as front-end, a CMOS PA-antenna array is designed, to additionally provide spatial power combining. The CMOS chip has a 2 x 4 array of pseudo-differential power amplifiers along with the signal distribution networks and pre-drivers. A quartz wafer with a 2 x 4 array of differential microstrip antennas deposited on it is placed on top of the CMOS chip, electromagnetically coupled to the PA outputs on the CMOS chip. The spatially power combined PA-antenna array achieved a measured equivalent isotropic radiated power (EIRP) of 33 dBm and an estimated output power of 24 dBm at 94 GHz. Modulated data measurements at 3 Gbps (375 MS/s, 256 QAM) speed using digital pre-distortion are demonstrated with the PA-antenna array. A novel layout style is introduced for stacked FET design at low mm-wave frequencies. A small multi-finger FET is laid out with fingers connected in series to create the stacked FET. The gate capacitors are realized around the FET with the back-end-of-line metal available in the CMOS process. Multiple multigate cells are interconnected to implement the stacked FET PA. A PA designed in this style in 45 nm CMOS SOI process achieved 24.8 dBm of output power and 29% PAE at 28 GHz with high reliability. This PA is very broadband and linear as shown by the modulated data measurements achieving a data rate of 36 Gbps (6 GS/s, 64 QAM) at 14 dBm with 9.3% PAE, with no digital predistortion. NFETs and PFETs available in nano-scale CMOS processes are compared and it is shown that in deeply scaled processes, PMOS devices are a viable alternative to NFETs due to their cut-off frequencies similar to those of NFETs, and higher breakdown voltages than NFETs. The first exclusively PMOS mm-wave PA design is reported. This 3-stack PA, made in 32 nm CMOS SOI process, achieved a maximum output power of 19.6 dBm and maximum efficiency of 24% at 78 GHz. All the designs reported in this thesis achieved either the highest output power or the highest PAE for a CMOS PA at their respective frequencies.

mm-Wave Silicon Power Amplifiers and Transmitters

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Author :
Publisher : Cambridge University Press
ISBN 13 : 1316395367
Total Pages : 471 pages
Book Rating : 4.3/5 (163 download)

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Book Synopsis mm-Wave Silicon Power Amplifiers and Transmitters by : Hossein Hashemi

Download or read book mm-Wave Silicon Power Amplifiers and Transmitters written by Hossein Hashemi and published by Cambridge University Press. This book was released on 2016-04-04 with total page 471 pages. Available in PDF, EPUB and Kindle. Book excerpt: Build high-performance, spectrally clean, energy-efficient mm-wave power amplifiers and transmitters with this cutting-edge guide to designing, modeling, analysing, implementing and testing new mm-wave systems. Suitable for students, researchers and practicing engineers, this self-contained guide provides in-depth coverage of state-of-the-art semiconductor devices and technologies, linear and nonlinear power amplifier technologies, efficient power combining systems, circuit concepts, system architectures and system-on-a-chip realizations. The world's foremost experts from industry and academia cover all aspects of the design process, from device technologies to system architectures. Accompanied by numerous case studies highlighting practical design techniques, tradeoffs and pitfalls, this is a superb resource for those working with high-frequency systems.