Digest of Papers

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Publisher :
ISBN 13 :
Total Pages : 138 pages
Book Rating : 4.3/5 (91 download)

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Book Synopsis Digest of Papers by :

Download or read book Digest of Papers written by and published by . This book was released on 1997 with total page 138 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Introduction to IDDQ Testing

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Publisher : Springer Science & Business Media
ISBN 13 : 146156137X
Total Pages : 336 pages
Book Rating : 4.4/5 (615 download)

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Book Synopsis Introduction to IDDQ Testing by : S. Chakravarty

Download or read book Introduction to IDDQ Testing written by S. Chakravarty and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 336 pages. Available in PDF, EPUB and Kindle. Book excerpt: Testing techniques for VLSI circuits are undergoing many exciting changes. The predominant method for testing digital circuits consists of applying a set of input stimuli to the IC and monitoring the logic levels at primary outputs. If, for one or more inputs, there is a discrepancy between the observed output and the expected output then the IC is declared to be defective. A new approach to testing digital circuits, which has come to be known as IDDQ testing, has been actively researched for the last fifteen years. In IDDQ testing, the steady state supply current, rather than the logic levels at the primary outputs, is monitored. Years of research suggests that IDDQ testing can significantly improve the quality and reliability of fabricated circuits. This has prompted many semiconductor manufacturers to adopt this testing technique, among them Philips Semiconductors, Ford Microelectronics, Intel, Texas Instruments, LSI Logic, Hewlett-Packard, SUN microsystems, Alcatel, and SGS Thomson. This increase in the use of IDDQ testing should be of interest to three groups of individuals associated with the IC business: Product Managers and Test Engineers, CAD Tool Vendors and Circuit Designers. Introduction to IDDQ Testing is designed to educate this community. The authors have summarized in one volume the main findings of more than fifteen years of research in this area.

IDDQ Testing of VLSI Circuits

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Publisher : Springer Science & Business Media
ISBN 13 : 1461531462
Total Pages : 121 pages
Book Rating : 4.4/5 (615 download)

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Book Synopsis IDDQ Testing of VLSI Circuits by : Ravi K. Gulati

Download or read book IDDQ Testing of VLSI Circuits written by Ravi K. Gulati and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 121 pages. Available in PDF, EPUB and Kindle. Book excerpt: Power supply current monitoring to detect CMOS IC defects during production testing quietly laid down its roots in the mid-1970s. Both Sandia Labs and RCA in the United States and Philips Labs in the Netherlands practiced this procedure on their CMOS ICs. At that time, this practice stemmed simply from an intuitive sense that CMOS ICs showing abnormal quiescent power supply current (IDDQ) contained defects. Later, this intuition was supported by data and analysis in the 1980s by Levi (RACD, Malaiya and Su (SUNY-Binghamton), Soden and Hawkins (Sandia Labs and the University of New Mexico), Jacomino and co-workers (Laboratoire d'Automatique de Grenoble), and Maly and co-workers (Carnegie Mellon University). Interest in IDDQ testing has advanced beyond the data reported in the 1980s and is now focused on applications and evaluations involving larger volumes of ICs that improve quality beyond what can be achieved by previous conventional means. In the conventional style of testing one attempts to propagate the logic states of the suspended nodes to primary outputs. This is done for all or most nodes of the circuit. For sequential circuits, in particular, the complexity of finding suitable tests is very high. In comparison, the IDDQ test does not observe the logic states, but measures the integrated current that leaks through all gates. In other words, it is like measuring a patient's temperature to determine the state of health. Despite perceived advantages, during the years that followed its initial announcements, skepticism about the practicality of IDDQ testing prevailed. The idea, however, provided a great opportunity to researchers. New results on test generation, fault simulation, design for testability, built-in self-test, and diagnosis for this style of testing have since been reported. After a decade of research, we are definitely closer to practice.

Component Reliability for Electronic Systems

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Publisher : Artech House
ISBN 13 : 1596934360
Total Pages : 706 pages
Book Rating : 4.5/5 (969 download)

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Book Synopsis Component Reliability for Electronic Systems by : Titu I. Băjenescu

Download or read book Component Reliability for Electronic Systems written by Titu I. Băjenescu and published by Artech House. This book was released on 2010 with total page 706 pages. Available in PDF, EPUB and Kindle. Book excerpt: The main reason for the premature breakdown of today's electronic products (computers, cars, tools, appliances, etc.) is the failure of the components used to build these products. Today professionals are looking for effective ways to minimize the degradation of electronic components to help ensure longer-lasting, more technically sound products and systems. This practical book offers engineers specific guidance on how to design more reliable components and build more reliable electronic systems. Professionals learn how to optimize a virtual component prototype, accurately monitor product reliability during the entire production process, and add the burn-in and selection procedures that are the most appropriate for the intended applications. Moreover, the book helps system designers ensure that all components are correctly applied, margins are adequate, wear-out failure modes are prevented during the expected duration of life, and system interfaces cannot lead to failure.

Defect Oriented Testing for CMOS Analog and Digital Circuits

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Publisher : Springer Science & Business Media
ISBN 13 : 1475749260
Total Pages : 317 pages
Book Rating : 4.4/5 (757 download)

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Book Synopsis Defect Oriented Testing for CMOS Analog and Digital Circuits by : Manoj Sachdev

Download or read book Defect Oriented Testing for CMOS Analog and Digital Circuits written by Manoj Sachdev and published by Springer Science & Business Media. This book was released on 2013-06-29 with total page 317 pages. Available in PDF, EPUB and Kindle. Book excerpt: Defect oriented testing is expected to play a significant role in coming generations of technology. Smaller feature sizes and larger die sizes will make ICs more sensitive to defects that can not be modeled by traditional fault modeling approaches. Furthermore, with increased level of integration, an IC may contain diverse building blocks. Such blocks include, digital logic, PLAs, volatile and non-volatile memories, and analog interfaces. For such diverse building blocks, traditional fault modeling and test approaches will become increasingly inadequate. Defect oriented testing methods have come a long way from a mere interesting academic exercise to a hard industrial reality. Many factors have contributed to its industrial acceptance. Traditional approaches of testing modern integrated circuits (ICs) have been found to be inadequate in terms of quality and economics of test. In a globally competitive semiconductor market place, overall product quality and economics have become very important objectives. In addition, electronic systems are becoming increasingly complex and demand components of highest possible quality. Testing, in general and, defect oriented testing, in particular, help in realizing these objectives. Defect Oriented Testing for CMOS Analog and Digital Circuits is the first book to provide a complete overview of the subject. It is essential reading for all design and test professionals as well as researchers and students working in the field. `A strength of this book is its breadth. Types of designs considered include analog and digital circuits, programmable logic arrays, and memories. Having a fault model does not automatically provide a test. Sometimes, design for testability hardware is necessary. Many design for testability ideas, supported by experimental evidence, are included.' ... from the Foreword by Vishwani D. Agrawal

Digital Systems Engineering

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Publisher : Cambridge University Press
ISBN 13 : 1139936239
Total Pages : 944 pages
Book Rating : 4.1/5 (399 download)

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Book Synopsis Digital Systems Engineering by : William J. Dally

Download or read book Digital Systems Engineering written by William J. Dally and published by Cambridge University Press. This book was released on 2008-04-24 with total page 944 pages. Available in PDF, EPUB and Kindle. Book excerpt: What makes some computers slow? Why do some digital systems operate reliably for years while others fail mysteriously every few hours? How can some systems dissipate kilowatts while others operate off batteries? These questions of speed, reliability, and power are all determined by the system-level electrical design of a digital system. Digital Systems Engineering presents a comprehensive treatment of these topics. It combines a rigorous development of the fundamental principles in each area with real-world examples of circuits and methods. The book not only serves as an undergraduate textbook, filling the gap between circuit design and logic design, but can also help practising digital designers keep pace with the speed and power of modern integrated circuits. The techniques described in this book, once used only in supercomputers, are essential to the correct and efficient operation of any type of digital system.

Guidebook for Managing Silicon Chip Reliability

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Publisher : CRC Press
ISBN 13 : 1351443569
Total Pages : 228 pages
Book Rating : 4.3/5 (514 download)

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Book Synopsis Guidebook for Managing Silicon Chip Reliability by : Michael Pecht

Download or read book Guidebook for Managing Silicon Chip Reliability written by Michael Pecht and published by CRC Press. This book was released on 2017-11-22 with total page 228 pages. Available in PDF, EPUB and Kindle. Book excerpt: Achieving cost-effective performance over time requires an organized, disciplined, and time-phased approach to product design, development, qualification, manufacture, and in-service management. Guidebook for Managing Silicon Chip Reliability examines the principal failure mechanisms associated with modern integrated circuits and describes common practices used to resolve them. This quick reference on semiconductor reliability addresses the key question: How will the understanding of failure mechanisms affect the future? Chapters discuss: failure sites, operational loads, and failure mechanism intrinsic device sensitivities electromigration hot carrier aging time dependent dielectric breakdown mechanical stress induced migration alpha particle sensitivity electrostatic discharge (ESD) and electrical overstress latch-up qualification screening guidelines for designing reliability Guidebook for Managing Silicon Chip Reliability focuses on device failure and causes throughout - providing a thorough framework on how to model the mechanism, test for defects, and avoid and manage damage. It will serve as an exceptional resource for electrical engineers as well as mechanical engineers working in the field of electronic packaging.

Proceedings of the ASP-DAC ... Asia and South Pacific Design Automation Conference

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Publisher :
ISBN 13 :
Total Pages : 876 pages
Book Rating : 4.3/5 (91 download)

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Book Synopsis Proceedings of the ASP-DAC ... Asia and South Pacific Design Automation Conference by :

Download or read book Proceedings of the ASP-DAC ... Asia and South Pacific Design Automation Conference written by and published by . This book was released on 2002 with total page 876 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Index of Patents Issued from the United States Patent and Trademark Office

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Publisher :
ISBN 13 :
Total Pages : 4160 pages
Book Rating : 4.3/5 (129 download)

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Book Synopsis Index of Patents Issued from the United States Patent and Trademark Office by :

Download or read book Index of Patents Issued from the United States Patent and Trademark Office written by and published by . This book was released on with total page 4160 pages. Available in PDF, EPUB and Kindle. Book excerpt:

18th IEEE VLSI Test Symposium

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Publisher : Institute of Electrical & Electronics Engineers(IEEE)
ISBN 13 : 9780769506135
Total Pages : 528 pages
Book Rating : 4.5/5 (61 download)

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Book Synopsis 18th IEEE VLSI Test Symposium by :

Download or read book 18th IEEE VLSI Test Symposium written by and published by Institute of Electrical & Electronics Engineers(IEEE). This book was released on 2000 with total page 528 pages. Available in PDF, EPUB and Kindle. Book excerpt: Proceedings of a spring 2000 symposium, highlighting novel ideas and approaches to current and future problems related to testing of electronic circuits and systems. Themes are microprocessor test/validation, low power BIST and scan, technology trends, scan- related approaches, defect-driven techniques, and system-on-chip test techniques. Other subjects are analog test techniques, temperature and process drift issues, test compaction and design validation, analog BIST, and functional test and verification issues. Also covered are STIL extension, IDDQ test, and on-line testing and fault tolerance. Lacks a subject index. Annotation copyrighted by Book News, Inc., Portland, OR.

On-Line Testing for VLSI

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Publisher : Springer Science & Business Media
ISBN 13 : 1475760698
Total Pages : 152 pages
Book Rating : 4.4/5 (757 download)

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Book Synopsis On-Line Testing for VLSI by : Michael Nicolaidis

Download or read book On-Line Testing for VLSI written by Michael Nicolaidis and published by Springer Science & Business Media. This book was released on 2013-03-09 with total page 152 pages. Available in PDF, EPUB and Kindle. Book excerpt: Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.

Proceedings

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Publisher :
ISBN 13 :
Total Pages : 632 pages
Book Rating : 4.3/5 (91 download)

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Book Synopsis Proceedings by :

Download or read book Proceedings written by and published by . This book was released on 2003 with total page 632 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Istfa '98

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Publisher : ASM International
ISBN 13 : 161503076X
Total Pages : 453 pages
Book Rating : 4.6/5 (15 download)

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Book Synopsis Istfa '98 by : ASM International

Download or read book Istfa '98 written by ASM International and published by ASM International. This book was released on 1998-01-01 with total page 453 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Digest of Technical Papers

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ISBN 13 :
Total Pages : 652 pages
Book Rating : 4.3/5 (91 download)

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Book Synopsis Digest of Technical Papers by :

Download or read book Digest of Technical Papers written by and published by . This book was released on 1999 with total page 652 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Models in Hardware Testing

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Publisher : Springer Science & Business Media
ISBN 13 : 9048132827
Total Pages : 263 pages
Book Rating : 4.0/5 (481 download)

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Book Synopsis Models in Hardware Testing by : Hans-Joachim Wunderlich

Download or read book Models in Hardware Testing written by Hans-Joachim Wunderlich and published by Springer Science & Business Media. This book was released on 2009-11-12 with total page 263 pages. Available in PDF, EPUB and Kindle. Book excerpt: Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.

IEEE VLSI Test Symposium

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ISBN 13 :
Total Pages : 448 pages
Book Rating : 4.3/5 (91 download)

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Book Synopsis IEEE VLSI Test Symposium by :

Download or read book IEEE VLSI Test Symposium written by and published by . This book was released on 2004 with total page 448 pages. Available in PDF, EPUB and Kindle. Book excerpt:

19th IEEE VLSI Test Symposium

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Publisher : Institute of Electrical & Electronics Engineers(IEEE)
ISBN 13 : 9780769511221
Total Pages : 458 pages
Book Rating : 4.5/5 (112 download)

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Book Synopsis 19th IEEE VLSI Test Symposium by :

Download or read book 19th IEEE VLSI Test Symposium written by and published by Institute of Electrical & Electronics Engineers(IEEE). This book was released on 2001 with total page 458 pages. Available in PDF, EPUB and Kindle. Book excerpt: Collects 58 papers from the April/May 2001 symposium that explore new approaches in the testing of electronic circuits and systems. Key areas in testing are discussed, such as BIST, analog measurement, fault tolerance, diagnosis methods, scan chain design, memory test and diagnosis, and test data compression and compaction. Also on the program are sessions on emerging areas that are gaining prominence, including low power testing, testing high speed circuits on low cost testers, processor based self test techniques, and core- based system-on-chip testing. Some of the topics are robust and low cost BIST architectures for sequential fault testing in datapath multipliers, a method for measuring the cycle-to-cycle period jitter of high-frequency clock signals, fault equivalence identification using redundancy information and static and dynamic extraction, and test scheduling for minimal energy consumption under power constraints. No subject index. c. Book News Inc.