Fabrication Of Graphene On Gan Vertical Transistors

Author : Azlan Baharin
Publisher :
ISBN 13 :
Total Pages : 320 pages
Book Rating : 4.:/5 (813 download)

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Download or read book An Investigation Into Fabrication Technologies for Vertical GaN Devices written by Azlan Baharin and published by . This book was released on 2011 with total page 320 pages. Available in PDF, EPUB and Kindle. Book excerpt: [Truncated abstract] Vertical transistors using GaN have significant advantages over planar devices in high power, high current applications. The principal focus of this thesis is to use the GaN n-p vertical diode as a model to understand the fabrication issues involved in vertical transistors. GaN n-p vertical diodes have been fabricated using Si ion implantation into p-doped material on a p+-buried layer. Ion implantation is widely used in semiconductor device technology because it offers precise control of the concentration and depth of dopants that are inserted in a specific area of the wafer and the technique can be easily applied to batch processing; GaN implantation technology is still in the developing phase and it is hoped that not too far in the future, ion implantation can also become a practical process for GaN-based devices. Amongst the major challenges faced for ion implantation in GaN is the extremely high and impractical annealing temperature (above 1500 °C) required for a complete recovery of implantation damage. This work has shown that a much lower annealing temperature of 1260 °C can be sufficient to minimise the damage and electrically activate the implanted dopants. In the first round of device fabrication, vertical diodes were successfully obtained using Si implantation with a variety of energies and doses. Although the performance was poor, with non-ohmic contacts to the buried p+-layer and a high turn on voltage of about 10 V, an active n-p junction was achieved with blue light emission when biased in the forward direction. However, the active area was restricted to the periphery of the circular devices. It was initially proposed that a likely cause for the low performance of the initial devices is related to the damage introduced to the p+-layers by plasma etching as well as insufficient activation of the Mg-doped GaN in the buried layer. Thus, further investigation into improving the quality of contacts to the etched-surface and activation of p-GaN buried layer were essential requisites, prior to fabricating a second round of vertical devices. Investigation into these two factors is also applicable to enhance the processing techniques of p-GaN based devices. Amongst the major issues with the processing of buried p-GaN layers is obtaining good ohmic contacts...