Design And Optimization Of High Speed Flash Analog To Digital Converters In Sige Bicmos Technologies

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Design and Optimization of High Speed Flash Analog-to-digital Converters in SiGe BiCMOS Technologies

Author : Philipp Ritter
Publisher :
ISBN 13 :
Total Pages : 0 pages
Book Rating : 4.:/5 (138 download)

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Book Synopsis Design and Optimization of High Speed Flash Analog-to-digital Converters in SiGe BiCMOS Technologies by : Philipp Ritter

Download or read book Design and Optimization of High Speed Flash Analog-to-digital Converters in SiGe BiCMOS Technologies written by Philipp Ritter and published by . This book was released on 2013 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: High speed Analog-to-Digital Converters (ADC) are essential building blocks for the reception and processing in high data rate reception circuits. The flash ADC archi- tecture performs the digitization by comparing the analog input signal to all refer- ence levels of the quantization range simultaneously and is thus the fastest architecture available. In the past the flash architecture has been employed successfully to digitize signals at Nyquist rates beyond 20 GS/s. However the inherent high speed operation has led to power consumptions of several watts and hence to poor energy efficien- cies. This thesis explores approaches to optimize the energy efficiency of flash ADCs. In particular, no dedicated track-and-hold stage is used at the high speed data input. This imposes very stringent requirements on the timing accuracy and level accuracy in the high speed signal distribution to the comparators. The comparators need to ex- hibit a very high speed capability to correctly perform the quantization of the signal against the reference levels. The main focus of this thesis is hence the investigation of design relevant high frequency effects in the analog ADC frontend, such as the bandwidth requirement of overdriven comparators, the data signal distribution over a passive transmission line tree and the dynamic linearity of emitter followers. The correctness and efficacy of the presented methods is demonstrated by measurement results of a 6 bit 20 GS/s Nyquist rate flash ADC fabricated within the context of this work. The demonstrator ADC operates without time interleaving, no calibration or correction whatsoever is needed. By employing design techniques borrowed from high speed analog circuits engineering and by exhausting the high speed potential of a state-of-the-art SiGe BiCMOS production technology, a flash ADC with a record energy efficiency could be realized.

High-speed Analog-to-digital Converters for Broadband Applications

Author : Ayman H. Ismail
Publisher :
ISBN 13 :
Total Pages : 122 pages
Book Rating : 4.:/5 (827 download)

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Book Synopsis High-speed Analog-to-digital Converters for Broadband Applications by : Ayman H. Ismail

Download or read book High-speed Analog-to-digital Converters for Broadband Applications written by Ayman H. Ismail and published by . This book was released on 2007 with total page 122 pages. Available in PDF, EPUB and Kindle. Book excerpt: Flash Analog-to-Digital Converters (ADCs), targeting optical communication standards, have been reported in SiGe BiCMOS technology. CMOS implementation of such designs faces two challenges. The first is to achieve a high sampling speed, given the lower gain-bandwidth (lower ft) of CMOS technology. The second challenge is to handle the wide bandwidth of the input signal with a certain accuracy. Although the first problem can be relaxed by using the time-interleaved architecture, the second problem remains as a main obstacle to CMOS implementation. As a result, the feasibility of the CMOS implementation of ADCs for such applications, or other wide band applications, depends primarily on achieving a very small input capacitance (large bandwidth) at the desired accuracy. In the flash architecture, the input capacitance is traded off for the achievable accuracy. This tradeoff becomes tighter with technology scaling. An effective way to ease this tradeoff is to use resistive offset averaging. This permits the use of smaller area transistors, leading to a reduction in the ADC input capacitance. In addition, interpolation can be used to decrease the input capacitance of flash ADCs. In an interpolating architecture, the number of ADC input preamplifiers is reduced significantly, and a resistor network interpolates the missing zero-crossings needed for an N-bit conversion. The resistive network also averages out the preamplifiers offsets. Consequently, an interpolating network works also as an averaging network. The resistor network used for averaging or interpolation causes a systematic non-linearity at the ADC transfer characteristics edges. The common solution to this problem is to extend the preamplifiers array beyond the input signal voltage range by using dummy preamplifiers. However, this demands a corresponding extension of the flash ADC reference-voltage resistor ladder. Since the voltage headroom of the reference ladder is considered to be a main bottleneck in the implementation of flash ADCs in deep-submicron technologies with reduced supply voltage, extending the reference voltage beyond the input voltage range is highly undesirable. The principal objective of this thesis is to develop a new circuit technique to enhance the bandwidth-accuracy product of flash ADCs. Thus, first, a rigorous analysis of flash ADC architectures accuracy-bandwidth tradeoff is presented.

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters

Author : Pedro M. Figueiredo
Publisher : Springer Science & Business Media
ISBN 13 : 1402097166
Total Pages : 395 pages
Book Rating : 4.4/5 (2 download)

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Book Synopsis Offset Reduction Techniques in High-Speed Analog-to-Digital Converters by : Pedro M. Figueiredo

Download or read book Offset Reduction Techniques in High-Speed Analog-to-Digital Converters written by Pedro M. Figueiredo and published by Springer Science & Business Media. This book was released on 2009-03-10 with total page 395 pages. Available in PDF, EPUB and Kindle. Book excerpt: Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.

Design of a High Speed Folding and Interpolation Analog to Digital Converter Implemented in 0.18 Um SiGe BiCMOS Process

Author : Quincy K. L. Fung
Publisher :
ISBN 13 :
Total Pages : 194 pages
Book Rating : 4.:/5 (234 download)

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Book Synopsis Design of a High Speed Folding and Interpolation Analog to Digital Converter Implemented in 0.18 Um SiGe BiCMOS Process by : Quincy K. L. Fung

Download or read book Design of a High Speed Folding and Interpolation Analog to Digital Converter Implemented in 0.18 Um SiGe BiCMOS Process written by Quincy K. L. Fung and published by . This book was released on 2008 with total page 194 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Low-Power High-Resolution Analog to Digital Converters

Author : Amir Zjajo
Publisher : Springer Science & Business Media
ISBN 13 : 9048197252
Total Pages : 311 pages
Book Rating : 4.0/5 (481 download)

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Book Synopsis Low-Power High-Resolution Analog to Digital Converters by : Amir Zjajo

Download or read book Low-Power High-Resolution Analog to Digital Converters written by Amir Zjajo and published by Springer Science & Business Media. This book was released on 2010-10-29 with total page 311 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.

High-speed Low-power CMOS Flash Analog-to-digital Converter for Wideband Communication System-on-a-chip

Author : Mingzhen Wang
Publisher :
ISBN 13 :
Total Pages : 147 pages
Book Rating : 4.:/5 (992 download)

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Book Synopsis High-speed Low-power CMOS Flash Analog-to-digital Converter for Wideband Communication System-on-a-chip by : Mingzhen Wang

Download or read book High-speed Low-power CMOS Flash Analog-to-digital Converter for Wideband Communication System-on-a-chip written by Mingzhen Wang and published by . This book was released on 2007 with total page 147 pages. Available in PDF, EPUB and Kindle. Book excerpt: With higher-level integration driven by increasingly complex digital systems and downscaling CMOS processes available, system-on-a-chip (SoC) is an emerging technology of low power, high cost effectiveness and high reliability and is exceedingly attractive for applications in high-speed data conversion wireless and wideband communication systems. This research presents a novel ADC comparator design methodology; the speed and performance of which is not restricted by the supply voltage reduction and device linearity deterioration in scaling-down CMOS processes. By developing a dynamic offset suppression technique and a circuit optimization method, the comparator can achieve a 3 dB frequency of 2 GHz in 130 nanometer (nm) CMOS process. Combining this new comparator design and a proposed pipelined thermometer-Gray- binary encoder designed by the DCVSPG logic, a high-speed, low-voltage clocked-digital- comparator (CDC) pipelined CMOS flash ADC architecture is proposed for wideband communication SoC. This architecture has advantages of small silicon area, low power, and low cost. Three CDC-based pipelined CMOS flash ADCs were implemented in 130 nm CMOS process and their experimental results are reported: 1. 4-b, 2.5-GSPS ADC: SFDR of 21.48-dB, SNDR of 15.99-dB, ENOB of 2.4-b, ERBW of 1-GHz, power of 7.9-mW, and area of 0.022-mm2. 2. 4-b, 4-GSPS ADC: SFDR of 25-dB, SNDR of 18.6-dB, ENOB of 2.8-b, ERBW of 2-GHz, power of 11-mW. 3. 6-b, 4-GSPS ADC: SFDR of 48-dB at a signal frequency of 11.72-MHz, SNDR of 34.43-dB, ENOB of 5.4-b, power of 28-mW. An application of the proposed CDC-based pipelined CMOS flash ADC is 1-GHz bandwidth, 2.5-GSPS digital receiver on a chip. To verify the performance of the receiver, a mixed-signal block-level simulation and verification flow was built in Cadence AMS integrated platform. The verification results of the digital receiver using a 4-b 2.5-GSPS CDC-based pipelined CMOS ADC, a 256-point, 12-point kernel function FFT and a frequency detection logic show that two tone signals up to 1125 MHz can be detected and discriminated. A notable contribution of this research is that the proposed ADC architecture and the comparator design with dynamic offset suppression and optimization are extremely suitable for future VDSM CMOS processes and make “all-digital” receiver SoC design practical.

High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications

Author : Weitao Li
Publisher : Springer
ISBN 13 : 3319620126
Total Pages : 181 pages
Book Rating : 4.3/5 (196 download)

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Book Synopsis High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications by : Weitao Li

Download or read book High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications written by Weitao Li and published by Springer. This book was released on 2017-08-01 with total page 181 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.

Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems

Author : Keh-La Lin
Publisher : Springer Science & Business Media
ISBN 13 : 0306487268
Total Pages : 270 pages
Book Rating : 4.3/5 (64 download)

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Book Synopsis Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems by : Keh-La Lin

Download or read book Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter of Embedded Systems written by Keh-La Lin and published by Springer Science & Business Media. This book was released on 2006-01-14 with total page 270 pages. Available in PDF, EPUB and Kindle. Book excerpt: One of the main trends of microelectronics is toward design for integrated systems, i.e., system-on-a-chip (SoC) or system-on-silicon (SoS). Due to this development, design techniques for mixed-signal circuits become more important than before. Among other devices, analog-to-digital and digital-to-analog converters are the two bridges between the analog and the digital worlds. Besides, low-power design technique is one of the main issues for embedded systems, especially for hand-held applications. Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter for Embedded Systems aims at design techniques for low-power, high-speed analog-to-digital converter processed by the standard CMOS technology. Additionally this book covers physical integration issues of A/D converter integrated in SoC, i.e., substrate crosstalk and reference voltage network design.

High-Speed Analog-to-Digital Conversion

Author : Michael J. Demler
Publisher : Elsevier
ISBN 13 : 0080508138
Total Pages : 233 pages
Book Rating : 4.0/5 (85 download)

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Book Synopsis High-Speed Analog-to-Digital Conversion by : Michael J. Demler

Download or read book High-Speed Analog-to-Digital Conversion written by Michael J. Demler and published by Elsevier. This book was released on 2012-12-02 with total page 233 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book covers the theory and applications of high-speed analog-to-digital conversion. An analog-to-digital converter takes real-world inputs (such as visual images, temperature readings, and rates of speed) and transforms them into digital form for processing by computer. This book discusses the design and uses of such circuits, with particular emphasis on improving the speed of the conversion process and the accuracy of its output--how well the output is a corresponding digital representation of the output*b1input signal. As computers become increasingly interfaced to the outside world, "ADC" techniques will become ever more important.

Delta-Sigma A/D-Converters

Author : Richard Gaggl
Publisher : Springer Science & Business Media
ISBN 13 : 3642345433
Total Pages : 157 pages
Book Rating : 4.6/5 (423 download)

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Book Synopsis Delta-Sigma A/D-Converters by : Richard Gaggl

Download or read book Delta-Sigma A/D-Converters written by Richard Gaggl and published by Springer Science & Business Media. This book was released on 2012-12-17 with total page 157 pages. Available in PDF, EPUB and Kindle. Book excerpt: The emphasis of this book is on practical design aspects for broadband A/D converters for communication systems. The embedded designs are employed for transceivers in the field of ADSL solutions and WLAN applications. An area- and power-efficient realization of a converter is mandatory to remain competitive in the market. The right choice for the converter topology and architecture needs to be done very carefully to result in a competitive FOM. The book begins with a brief overview of basic concepts about ADSL and WLAN to understand the ADC requirements. At architectural level, issues on different modulator topologies are discussed employing the provided technology node. The design issues are pointed out in detail for modern digital CMOS technologies, beginning with 180nm followed by 130nm and going down to 65nm feature size. Beside practical aspects, challenges to mixed-signal design level are addressed to optimize the converters in terms of consumed chip area, power consumption and design for high yield in volume production. Thus, careful considerations on circuit- and architectural- level are performed by introducing a dynamic-biasing technique, a feed-forward approach and a resolution in time instead of amplitude resolution.

Reference-Free CMOS Pipeline Analog-to-Digital Converters

Author : Michael Figueiredo
Publisher : Springer Science & Business Media
ISBN 13 : 146143467X
Total Pages : 189 pages
Book Rating : 4.4/5 (614 download)

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Book Synopsis Reference-Free CMOS Pipeline Analog-to-Digital Converters by : Michael Figueiredo

Download or read book Reference-Free CMOS Pipeline Analog-to-Digital Converters written by Michael Figueiredo and published by Springer Science & Business Media. This book was released on 2012-08-24 with total page 189 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.

Millimeter-Wave Analog to Digital Converters

Author : Shahriar Shahramian
Publisher : LAP Lambert Academic Publishing
ISBN 13 : 9783848432738
Total Pages : 128 pages
Book Rating : 4.4/5 (327 download)

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Book Synopsis Millimeter-Wave Analog to Digital Converters by : Shahriar Shahramian

Download or read book Millimeter-Wave Analog to Digital Converters written by Shahriar Shahramian and published by LAP Lambert Academic Publishing. This book was released on 2012-05 with total page 128 pages. Available in PDF, EPUB and Kindle. Book excerpt: While data converters have been around for nearly nighty years, mm-wave data converters are still in their infancy. Only recently the 40-GHz sampling barrier was broken with the introduction of the next generation high-speed sampling oscilloscopes. Meanwhile, data communication is the main driving force behind mm-wave data converter development. As with any mm-wave circuit, designers must go beyond simply relying on technology advancement to archives acceptable performance. Careful device and passive modeling is critical and systematic design methodology may offer repeatable and scalable mm-wave designs. In this book the design methodology and architectural challenges of mm-wave ADCs are explored. Some of the fundamental mm-wave ADC building blocks such as track and hold amplifiers, data distribution networks and flip-flops are implemented in SiGe BiCMOS and CMOS technologies and characterized. Several record breaking circuits are presented along with systematic design methodology. The impact of these circuit blocks on the performance of the next generation ADCs is studied and experimentally verified using a 35-GS/s, 4-bit ADC-DAC chain implemented in a SiGe BiCMOS technology.

Design of a High Speed Folding and Interpolation Analog to Digital Converter Implemented in 0.18 Micrometer Silicon Germanide BiCMOS Process

Download Design of a High Speed Folding and Interpolation Analog to Digital Converter Implemented in 0.18 Micrometer Silicon Germanide BiCMOS Process PDF Online Free

Author : Quincy Kwan-Lun Fung
Publisher :
ISBN 13 : 9780494397350
Total Pages : 194 pages
Book Rating : 4.3/5 (973 download)

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Book Synopsis Design of a High Speed Folding and Interpolation Analog to Digital Converter Implemented in 0.18 Micrometer Silicon Germanide BiCMOS Process by : Quincy Kwan-Lun Fung

Download or read book Design of a High Speed Folding and Interpolation Analog to Digital Converter Implemented in 0.18 Micrometer Silicon Germanide BiCMOS Process written by Quincy Kwan-Lun Fung and published by . This book was released on 2008 with total page 194 pages. Available in PDF, EPUB and Kindle. Book excerpt: This thesis describes the design and implementation of an 8 bit, 2 GSamples/s analog to digital converter for a 0.18 mum SiGe BiCMOS process with a unity gain cut off frequency of 60 GHz. This folding and interpolation ADC consists of a highly linear track-and-hold amplifier (THA) with 10 bit resolution, a differential resistor ladder, four folding amplifiers, an interpolation stage, a comparator array, a digital encoder with bubble error correction scheme and a coarse quantizer. The microchip area is 3.0 x 3.4 mm2 including pads and buffer circuits. Simulation results show that this ADC has a maximum signal-to-noise and distortion ratio (SNDR) of 48.9 dB corresponding to a 7.5 effective number of bits (ENOB) and an effective resolution bandwidth (ERBW) of 700MHz. The circuit demonstrates a maximum differential nonlinearity (DNL) and integral nonlinearity (INL) of 0.4 and 0.8 LSB, respectively while consuming 3.1W from a single 3.5 V supply.

CMOS Telecom Data Converters

Author : Angel Rodríguez-Vázquez
Publisher : Springer Science & Business Media
ISBN 13 : 1475737246
Total Pages : 610 pages
Book Rating : 4.4/5 (757 download)

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Book Synopsis CMOS Telecom Data Converters by : Angel Rodríguez-Vázquez

Download or read book CMOS Telecom Data Converters written by Angel Rodríguez-Vázquez and published by Springer Science & Business Media. This book was released on 2013-03-09 with total page 610 pages. Available in PDF, EPUB and Kindle. Book excerpt: CMOS Telecom Data Converters compiles the latest achievements regarding the design of high-speed and high-resolution data converters in deep submicron CMOS technologies. The four types of analog-to-digital converter architectures commonly found in this arena are covered, namely sigma-delta, pipeline, folding/interpolating and flash. For all these types, latest achievements regarding the solution of critical architectural and circuital issues are presented, and illustrated through IC prototypes with measured state-of-the-art performances. Some of these prototypes are conceived to be employed at the chipset of newest generation wireline modems (ADSL and ADSL+). Others are intended for wireless transceivers. Besides analog-to-digital converters, the book also covers other functions needed for communication systems, such as digital-to-analog converters, analog filters, programmable gain amplifiers, digital filters, and line drivers.

High Speed and Wide Bandwidth Delta-Sigma ADCs

Author : Muhammed Bolatkale
Publisher : Springer
ISBN 13 : 3319058401
Total Pages : 135 pages
Book Rating : 4.3/5 (19 download)

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Book Synopsis High Speed and Wide Bandwidth Delta-Sigma ADCs by : Muhammed Bolatkale

Download or read book High Speed and Wide Bandwidth Delta-Sigma ADCs written by Muhammed Bolatkale and published by Springer. This book was released on 2014-05-27 with total page 135 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book describes techniques for realizing wide bandwidth (125MHz) over-sampled analog-to-digital converters (ADCs) in nano meter-CMOS processes. The authors offer a clear and complete picture of system level challenges and practical design solutions in high-speed Delta-Sigma modulators. Readers will be enabled to implement ADCs as continuous-time delta-sigma (CT∆Σ) modulators, offering simple resistive inputs, which do not require the use of power-hungry input buffers, as well as offering inherent anti-aliasing, which simplifies system integration. The authors focus on the design of high speed and wide-bandwidth ΔΣMs that make a step in bandwidth range which was previously only possible with Nyquist converters. More specifically, this book describes the stability, power efficiency and linearity limits of ΔΣMs, aiming at a GHz sampling frequency.

Millimeter-Wave Analog to Digital Converters: Technology Challenges and Architectures

Author : Shahriar Shahramian
Publisher :
ISBN 13 : 9780494776308
Total Pages : 250 pages
Book Rating : 4.7/5 (763 download)

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Book Synopsis Millimeter-Wave Analog to Digital Converters: Technology Challenges and Architectures by : Shahriar Shahramian

Download or read book Millimeter-Wave Analog to Digital Converters: Technology Challenges and Architectures written by Shahriar Shahramian and published by . This book was released on 2011 with total page 250 pages. Available in PDF, EPUB and Kindle. Book excerpt: While data converters have been around for nearly nighty years, mm-wave data con- verters are still in their infancy. Only recently the 40-GHz sampling barrier was broken with the introduction of the next generation high-speed sampling oscilloscopes. Mean- while, data communication is the main driving force behind mm-wave data converter development. As with any mm-wave circuit, designers must go beyond simply relying on technology advancement to archives acceptable performance. Careful device and passive modeling is critical and systematic design methodology may offer repeatable and scalable mm-wave designs.In this thesis the design methodology and architectural challenges of mm-wave ADCs are explored. Some of the fundamental mm-wave ADC building blocks such as track and hold amplifers, data distribution networks and flip-flops are implemented in SiGe BiCMOS and CMOS technologies and characterized. Several record breaking circuits are presented along with systematic design methodology. The impact of these circuit blocks on the performance of the next generation ADCs is studied and experimentally verified using a 35-GS/s, 4-bit ADC-DAC chain implemented in a SiGe BiCMOS technology.

Data Conversion Handbook

Author : Analog Devices Inc. Analog Devices Inc. Engineeri
Publisher : Elsevier
ISBN 13 : 0080477011
Total Pages : 976 pages
Book Rating : 4.0/5 (84 download)

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Book Synopsis Data Conversion Handbook by : Analog Devices Inc. Analog Devices Inc. Engineeri

Download or read book Data Conversion Handbook written by Analog Devices Inc. Analog Devices Inc. Engineeri and published by Elsevier. This book was released on 2004-12-18 with total page 976 pages. Available in PDF, EPUB and Kindle. Book excerpt: This comprehensive handbook is a one-stop engineering reference. Covering data converter fundamentals, techniques, applications, and beginning with the basic theoretical elements necessary for a complete understanding of data converters, this reference covers all the latest advances in the field. This text describes in depth the theory behind and the practical design of data conversion circuits as well as describing the different architectures used in A/D and D/A converters. Details are provided on the design of high-speed ADCs, high accuracy DACs and ADCs, and sample-and-hold amplifiers. Also, this reference covers voltage sources and current reference, noise-shaping coding, and sigma-delta converters, and much more. The book’s 900-plus pages are packed with design information and application circuits, including guidelines on selecting the most suitable converters for particular applications. You’ll find the very latest information on: · Data converter fundamentals, such as key specifications, noise, sampling, and testing · Architectures and processes, including SAR, flash, pipelined, folding, and more · Practical hardware design techniques for mixed-signal systems, such as driving ADCs, buffering DAC outputs, sampling clocks, layout, interfacing, support circuits, and tools. · Data converter applications dealing with precision measurement, data acquisition, audio, display, DDS, software radio and many more. The accompanying CD-ROM provides software tools for testing and analyzing data converters as well as a searchable pdf version of the text. * Brings together a huge amount of information impossible to locate elsewhere. * Many recent advances in converter technology simply aren't covered in any other book. * A must-have design reference for any electronics design engineer or technician.