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Author : Kyle W. Terrill
Publisher :
ISBN 13 :
Total Pages : 125 pages
Book Rating : 4.:/5 (17 download)
Download or read book CMOS latch-up modeling and prevention written by Kyle W. Terrill and published by . This book was released on 1987 with total page 125 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Kyle Wendell Terrill
Publisher :
ISBN 13 :
Total Pages : 272 pages
Book Rating : 4.:/5 (29 download)
Download or read book CMOS Latch-up Modeling and Prevention written by Kyle Wendell Terrill and published by . This book was released on 1985 with total page 272 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Donald B. Estreich
Publisher :
ISBN 13 :
Total Pages : 344 pages
Book Rating : 4.F/5 ( download)
Download or read book The Physics and Modeling of Latch-up and CMOS Integrated Circuits written by Donald B. Estreich and published by . This book was released on 1980 with total page 344 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : R.R. Troutman
Publisher : Springer Science & Business Media
ISBN 13 : 9780898382150
Total Pages : 270 pages
Book Rating : 4.3/5 (821 download)
Download or read book Latchup in CMOS Technology written by R.R. Troutman and published by Springer Science & Business Media. This book was released on 1986-04-30 with total page 270 pages. Available in PDF, EPUB and Kindle. Book excerpt: Why a book on Iatchup? Latchup has been, and continues to be, a potentially serious CMOS reliability concern. This concern is becoming more widespread with the ascendency of CMOS as the dominant VLSI technology, particularly as parasitic bipolar characteristics continue to improve at ever smaller dimensions on silicon wafers with ever lower defect densities. Although many successful parts have been marketed, latchup solutions have often been ad hoc. Although latchup avoidance techniques have been previously itemized, there has been little quantitative evaluation of prior latchup fixes. What is needed is a more general, more systematic treatment of the latchup problem. Because of the wide variety of CMOS technologies and the long term interest in latchup, some overall guiding principles are needed. Appreciating the variety of possible triggering mechanisms is key to a real understanding of latchup. This work reviews the origin of each and its effect on the parasitic structure. Each triggering mechanism is classified according to a new taxonomy.
Download or read book CMOS Latch-up Analysis and Prevention written by and published by . This book was released on 1975 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 9780470516164
Total Pages : 472 pages
Book Rating : 4.5/5 (161 download)
Download or read book Latchup written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2008-04-15 with total page 472 pages. Available in PDF, EPUB and Kindle. Book excerpt: Interest in latchup is being renewed with the evolution of complimentary metal-oxide semiconductor (CMOS) technology, metal-oxide-semiconductor field-effect transistor (MOSFET) scaling, and high-level system-on-chip (SOC) integration. Clear methodologies that grant protection from latchup, with insight into the physics, technology and circuit issues involved, are in increasing demand. This book describes CMOS and BiCMOS semiconductor technology and their sensitivity to present day latchup phenomena, from basic over-voltage and over-current conditions, single event latchup (SEL) and cable discharge events (CDE), to latchup domino phenomena. It contains chapters focusing on bipolar physics, latchup theory, latchup and guard ring characterization structures, characterization testing, product level test systems, product level testing and experimental results. Discussions on state-of-the-art semiconductor processes, design layout, and circuit level and system level latchup solutions are also included, as well as: latchup semiconductor process solutions for both CMOS to BiCMOS, such as shallow trench, deep trench, retrograde wells, connecting implants, sub-collectors, heavily-doped buried layers, and buried grids – from single- to triple-well CMOS; practical latchup design methods, automated and bench-level latchup testing methods and techniques, latchup theory of logarithm resistance space, generalized alpha (a) space, beta (b) space, new latchup design methods– connecting the theoretical to the practical analysis, and; examples of latchup computer aided design (CAD) methodologies, from design rule checking (DRC) and logical-to-physical design, to new latchup CAD methodologies that address latchup for internal and external latchup on a local as well as global design level. Latchup acts as a companion text to the author’s series of books on ESD (electrostatic discharge) protection, serving as an invaluable reference for the professional semiconductor chip and system-level ESD engineer. Semiconductor device, process and circuit designers, and quality, reliability and failure analysis engineers will find it informative on the issues that confront modern CMOS technology. Practitioners in the automotive and aerospace industries will also find it useful. In addition, its academic treatment will appeal to both senior and graduate students with interests in semiconductor process, device physics, computer aided design and design integration.
Author : Ming-Dou Ker
Publisher : John Wiley & Sons
ISBN 13 : 0470824085
Total Pages : 265 pages
Book Rating : 4.4/5 (78 download)
Download or read book Transient-Induced Latchup in CMOS Integrated Circuits written by Ming-Dou Ker and published by John Wiley & Sons. This book was released on 2009-07-23 with total page 265 pages. Available in PDF, EPUB and Kindle. Book excerpt: The book all semiconductor device engineers must read to gain a practical feel for latchup-induced failure to produce lower-cost and higher-density chips. Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process. Presents real cases and solutions that occur in commercial CMOS IC chips Equips engineers with the skills to conserve chip layout area and decrease time-to-market Written by experts with real-world experience in circuit design and failure analysis Distilled from numerous courses taught by the authors in IC design houses worldwide The only book to introduce TLU under system-level ESD and EFT tests This book is essential for practicing engineers involved in IC design, IC design management, system and application design, reliability, and failure analysis. Undergraduate and postgraduate students, specializing in CMOS circuit design and layout, will find this book to be a valuable introduction to real-world industry problems and a key reference during the course of their careers.
Author : Rajesh Kumar Gupta
Publisher :
ISBN 13 :
Total Pages : 228 pages
Book Rating : 4.:/5 (216 download)
Download or read book Analysis and Prevention of Latch-up in CMOS Integrated Circuits written by Rajesh Kumar Gupta and published by . This book was released on 1985 with total page 228 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : N. A. Angelides
Publisher :
ISBN 13 :
Total Pages : pages
Book Rating : 4.:/5 (643 download)
Download or read book The Causes and Prevention of Latch-up in CMOS Integrated Circuits written by N. A. Angelides and published by . This book was released on 1986 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Ban Wong
Publisher : John Wiley & Sons
ISBN 13 : 0471678864
Total Pages : 413 pages
Book Rating : 4.4/5 (716 download)
Download or read book Nano-CMOS Circuit and Physical Design written by Ban Wong and published by John Wiley & Sons. This book was released on 2005-04-08 with total page 413 pages. Available in PDF, EPUB and Kindle. Book excerpt: Based on the authors' expansive collection of notes taken over the years, Nano-CMOS Circuit and Physical Design bridges the gap between physical and circuit design and fabrication processing, manufacturability, and yield. This innovative book covers: process technology, including sub-wavelength optical lithography; impact of process scaling on circuit and physical implementation and low power with leaky transistors; and DFM, yield, and the impact of physical implementation.
Author : Richard S. Muller
Publisher : John Wiley & Sons
ISBN 13 : 0471593982
Total Pages : 564 pages
Book Rating : 4.4/5 (715 download)
Download or read book Device Electronics for Integrated Circuits written by Richard S. Muller and published by John Wiley & Sons. This book was released on 2002-10-28 with total page 564 pages. Available in PDF, EPUB and Kindle. Book excerpt: Focusing specifically on silicon devices, the Third Edition of Device Electronics for Integrated Circuits takes students in integrated-circuits courses from fundamental physics to detailed device operation. Because the book focuses primarily on silicon devices, each topic can include more depth, and extensive worked examples and practice problems ensure that students understand the details.
Author :
Publisher :
ISBN 13 :
Total Pages : 306 pages
Book Rating : 4.:/5 (3 download)
Download or read book Scientific and Technical Aerospace Reports written by and published by . This book was released on 1991 with total page 306 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Philip Joseph Oldiges
Publisher :
ISBN 13 :
Total Pages : 180 pages
Book Rating : 4.E/5 ( download)
Download or read book Test Structures for CMOS Latch-up Prediction written by Philip Joseph Oldiges and published by . This book was released on 1985 with total page 180 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author :
Publisher : ASM International
ISBN 13 : 0871708043
Total Pages : 813 pages
Book Rating : 4.8/5 (717 download)
Download or read book Microelectronics Failure Analysis written by and published by ASM International. This book was released on 2004-01-01 with total page 813 pages. Available in PDF, EPUB and Kindle. Book excerpt: For newcomers cast into the waters to sink or swim as well as seasoned professionals who want authoritative guidance desk-side, this hefty volume updates the previous (1999) edition. It contains the work of expert contributors who rallied to the job in response to a committee's call for help (the committee was assigned to the update by the Electron
Author : Badih El-Kareh
Publisher : Springer Science & Business Media
ISBN 13 : 0387690107
Total Pages : 614 pages
Book Rating : 4.3/5 (876 download)
Download or read book Silicon Devices and Process Integration written by Badih El-Kareh and published by Springer Science & Business Media. This book was released on 2009-01-09 with total page 614 pages. Available in PDF, EPUB and Kindle. Book excerpt: Silicon Devices and Process Integration covers state-of-the-art silicon devices, their characteristics, and their interactions with process parameters. It serves as a comprehensive guide which addresses both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. The book is compiled from the author’s industrial and academic lecture notes and reflects years of experience in the development of silicon devices. Features include: A review of silicon properties which provides a foundation for understanding the device properties discussion, including mobility-enhancement by straining silicon; State-of-the-art technologies on high-K gate dielectrics, low-K dielectrics, Cu interconnects, and SiGe BiCMOS; CMOS-only applications, such as subthreshold current and parasitic latch-up; Advanced Enabling processes and process integration. This book is written for engineers and scientists in semiconductor research, development and manufacturing. The problems at the end of each chapter and the numerous charts, figures and tables also make it appropriate for use as a text in graduate and advanced undergraduate courses in electrical engineering and materials science.
Author : Oleg Semenov
Publisher : Springer Science & Business Media
ISBN 13 : 1402083017
Total Pages : 237 pages
Book Rating : 4.4/5 (2 download)
Download or read book ESD Protection Device and Circuit Design for Advanced CMOS Technologies written by Oleg Semenov and published by Springer Science & Business Media. This book was released on 2008-04-26 with total page 237 pages. Available in PDF, EPUB and Kindle. Book excerpt: ESD Protection Device and Circuit Design for Advanced CMOS Technologies is intended for practicing engineers working in the areas of circuit design, VLSI reliability and testing domains. As the problems associated with ESD failures and yield losses become significant in the modern semiconductor industry, the demand for graduates with a basic knowledge of ESD is also increasing. Today, there is a significant demand to educate the circuits design and reliability teams on ESD issues. This book makes an attempt to address the ESD design and implementation in a systematic manner. A design procedure involving device simulators as well as circuit simulator is employed to optimize device and circuit parameters for optimal ESD as well as circuit performance. This methodology, described in ESD Protection Device and Circuit Design for Advanced CMOS Technologies has resulted in several successful ESD circuit design with excellent silicon results and demonstrates its strengths.
Author : M. Michael Vai
Publisher : CRC Press
ISBN 13 : 1351990659
Total Pages : 424 pages
Book Rating : 4.3/5 (519 download)
Download or read book VLSI Design written by M. Michael Vai and published by CRC Press. This book was released on 2017-12-19 with total page 424 pages. Available in PDF, EPUB and Kindle. Book excerpt: Very Large Scale Integration (VLSI) has become a necessity rather than a specialization for electrical and computer engineers. This unique text provides Engineering and Computer Science students with a comprehensive study of the subject, covering VLSI from basic design techniques to working principles of physical design automation tools to leading edge application-specific array processors. Beginning with CMOS design, the author describes VLSI design from the viewpoint of a digital circuit engineer. He develops physical pictures for CMOS circuits and demonstrates the top-down design methodology using two design projects - a microprocessor and a field programmable gate array. The author then discusses VLSI testing and dedicates an entire chapter to the working principles, strengths, and weaknesses of ubiquitous physical design tools. Finally, he unveils the frontiers of VLSI. He emphasizes its use as a tool to develop innovative algorithms and architecture to solve previously intractable problems. VLSI Design answers not only the question of "what is VLSI," but also shows how to use VLSI. It provides graduate and upper level undergraduate students with a complete and congregated view of VLSI engineering.
