Low Power High Fault Coverage Test Techniques For Digital Vlsi Circuits

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Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits

Author : M. Bushnell
Publisher : Springer Science & Business Media
ISBN 13 : 0306470403
Total Pages : 690 pages
Book Rating : 4.3/5 (64 download)

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Book Synopsis Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits by : M. Bushnell

Download or read book Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits written by M. Bushnell and published by Springer Science & Business Media. This book was released on 2006-04-11 with total page 690 pages. Available in PDF, EPUB and Kindle. Book excerpt: The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers.

Power-Aware Testing and Test Strategies for Low Power Devices

Author : Patrick Girard
Publisher : Springer Science & Business Media
ISBN 13 : 1441909281
Total Pages : 376 pages
Book Rating : 4.4/5 (419 download)

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Book Synopsis Power-Aware Testing and Test Strategies for Low Power Devices by : Patrick Girard

Download or read book Power-Aware Testing and Test Strategies for Low Power Devices written by Patrick Girard and published by Springer Science & Business Media. This book was released on 2010-03-11 with total page 376 pages. Available in PDF, EPUB and Kindle. Book excerpt: Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and EDA solutions for testing low power devices.

VLSI-SoC: Design for Reliability, Security, and Low Power

Author : Youngsoo Shin
Publisher : Springer
ISBN 13 : 3319460978
Total Pages : 236 pages
Book Rating : 4.3/5 (194 download)

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Book Synopsis VLSI-SoC: Design for Reliability, Security, and Low Power by : Youngsoo Shin

Download or read book VLSI-SoC: Design for Reliability, Security, and Low Power written by Youngsoo Shin and published by Springer. This book was released on 2016-09-12 with total page 236 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book contains extended and revised versions of the best papers presented at the 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, held in Daejeon, Korea, in October 2015. The 10 papers included in the book were carefully reviewed and selected from the 44 full papers presented at the conference. The papers cover a wide range of topics in VLSI technology and advanced research. They address the current trend toward increasing chip integration and technology process advancements bringing about new challenges both at the physical and system-design levels, as well as in the test of these systems.

Thermal-Aware Testing of Digital VLSI Circuits and Systems

Author : Santanu Chattopadhyay
Publisher : CRC Press
ISBN 13 : 1351227769
Total Pages : 86 pages
Book Rating : 4.3/5 (512 download)

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Book Synopsis Thermal-Aware Testing of Digital VLSI Circuits and Systems by : Santanu Chattopadhyay

Download or read book Thermal-Aware Testing of Digital VLSI Circuits and Systems written by Santanu Chattopadhyay and published by CRC Press. This book was released on 2018-04-24 with total page 86 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book aims to highlight the research activities in the domain of thermal-aware testing. Thermal-aware testing can be employed both at circuit level and at system level Describes range of algorithms for addressing thermal-aware test issue, presents comparison of temperature reduction with power-aware techniques and include results on benchmark circuits and systems for different techniques This book will be suitable for researchers working on power- and thermal-aware design and the testing of digital VLSI chips

Power-Constrained Testing of VLSI Circuits

Author : Nicola Nicolici
Publisher : Springer Science & Business Media
ISBN 13 : 140207235X
Total Pages : 182 pages
Book Rating : 4.4/5 (2 download)

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Book Synopsis Power-Constrained Testing of VLSI Circuits by : Nicola Nicolici

Download or read book Power-Constrained Testing of VLSI Circuits written by Nicola Nicolici and published by Springer Science & Business Media. This book was released on 2003-02-28 with total page 182 pages. Available in PDF, EPUB and Kindle. Book excerpt: This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.

System-on-Chip Test Architectures

Author : Laung-Terng Wang
Publisher : Morgan Kaufmann
ISBN 13 : 0080556809
Total Pages : 893 pages
Book Rating : 4.0/5 (85 download)

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Book Synopsis System-on-Chip Test Architectures by : Laung-Terng Wang

Download or read book System-on-Chip Test Architectures written by Laung-Terng Wang and published by Morgan Kaufmann. This book was released on 2010-07-28 with total page 893 pages. Available in PDF, EPUB and Kindle. Book excerpt: Modern electronics testing has a legacy of more than 40 years. The introduction of new technologies, especially nanometer technologies with 90nm or smaller geometry, has allowed the semiconductor industry to keep pace with the increased performance-capacity demands from consumers. As a result, semiconductor test costs have been growing steadily and typically amount to 40% of today's overall product cost. This book is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that will allow students, researchers, DFT practitioners, and VLSI designers to master quickly System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. - Emphasizes VLSI Test principles and Design for Testability architectures, with numerous illustrations/examples. - Most up-to-date coverage available, including Fault Tolerance, Low-Power Testing, Defect and Error Tolerance, Network-on-Chip (NOC) Testing, Software-Based Self-Testing, FPGA Testing, MEMS Testing, and System-In-Package (SIP) Testing, which are not yet available in any testing book. - Covers the entire spectrum of VLSI testing and DFT architectures, from digital and analog, to memory circuits, and fault diagnosis and self-repair from digital to memory circuits. - Discusses future nanotechnology test trends and challenges facing the nanometer design era; promising nanotechnology test techniques, including Quantum-Dots, Cellular Automata, Carbon-Nanotubes, and Hybrid Semiconductor/Nanowire/Molecular Computing. - Practical problems at the end of each chapter for students.

Low-Power High-Resolution Analog to Digital Converters

Author : Amir Zjajo
Publisher : Springer Science & Business Media
ISBN 13 : 9048197252
Total Pages : 311 pages
Book Rating : 4.0/5 (481 download)

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Book Synopsis Low-Power High-Resolution Analog to Digital Converters by : Amir Zjajo

Download or read book Low-Power High-Resolution Analog to Digital Converters written by Amir Zjajo and published by Springer Science & Business Media. This book was released on 2010-10-29 with total page 311 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.

Electronics and Communications Engineering

Author : T. Kishore Kumar
Publisher : CRC Press
ISBN 13 : 135113681X
Total Pages : 390 pages
Book Rating : 4.3/5 (511 download)

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Book Synopsis Electronics and Communications Engineering by : T. Kishore Kumar

Download or read book Electronics and Communications Engineering written by T. Kishore Kumar and published by CRC Press. This book was released on 2019-06-07 with total page 390 pages. Available in PDF, EPUB and Kindle. Book excerpt: Every day, millions of people are unaware of the amazing processes that take place when using their phones, connecting to broadband internet, watching television, or even the most basic action of flipping on a light switch. Advances are being continually made in not only the transmission of this data but also in the new methods of receiving it. These advancements come from many different sources and from engineers who have engaged in research, design, development, and implementation of electronic equipment used in communications systems. This volume addresses a selection of important current advancements in the electronics and communications engineering fields, focusing on signal processing, chip design, and networking technology. The sections in the book cover: Microwave and antennas Communications systems Very large-scale integration Embedded systems Intelligent control and signal processing systems

Sixth International Conferencew on Information Technology

Author :
Publisher : Allied Publishers
ISBN 13 : 9788177645583
Total Pages : 658 pages
Book Rating : 4.6/5 (455 download)

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Book Synopsis Sixth International Conferencew on Information Technology by :

Download or read book Sixth International Conferencew on Information Technology written by and published by Allied Publishers. This book was released on with total page 658 pages. Available in PDF, EPUB and Kindle. Book excerpt:

Electronic Design Automation for IC System Design, Verification, and Testing

Author : Luciano Lavagno
Publisher : CRC Press
ISBN 13 : 1351830996
Total Pages : 773 pages
Book Rating : 4.3/5 (518 download)

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Book Synopsis Electronic Design Automation for IC System Design, Verification, and Testing by : Luciano Lavagno

Download or read book Electronic Design Automation for IC System Design, Verification, and Testing written by Luciano Lavagno and published by CRC Press. This book was released on 2017-12-19 with total page 773 pages. Available in PDF, EPUB and Kindle. Book excerpt: The first of two volumes in the Electronic Design Automation for Integrated Circuits Handbook, Second Edition, Electronic Design Automation for IC System Design, Verification, and Testing thoroughly examines system-level design, microarchitectural design, logic verification, and testing. Chapters contributed by leading experts authoritatively discuss processor modeling and design tools, using performance metrics to select microprocessor cores for integrated circuit (IC) designs, design and verification languages, digital simulation, hardware acceleration and emulation, and much more. New to This Edition: Major updates appearing in the initial phases of the design flow, where the level of abstraction keeps rising to support more functionality with lower non-recurring engineering (NRE) costs Significant revisions reflected in the final phases of the design flow, where the complexity due to smaller and smaller geometries is compounded by the slow progress of shorter wavelength lithography New coverage of cutting-edge applications and approaches realized in the decade since publication of the previous edition—these are illustrated by new chapters on high-level synthesis, system-on-chip (SoC) block-based design, and back-annotating system-level models Offering improved depth and modernity, Electronic Design Automation for IC System Design, Verification, and Testing provides a valuable, state-of-the-art reference for electronic design automation (EDA) students, researchers, and professionals.

On-Line Testing for VLSI

Author : Michael Nicolaidis
Publisher : Springer Science & Business Media
ISBN 13 : 1475760698
Total Pages : 152 pages
Book Rating : 4.4/5 (757 download)

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Book Synopsis On-Line Testing for VLSI by : Michael Nicolaidis

Download or read book On-Line Testing for VLSI written by Michael Nicolaidis and published by Springer Science & Business Media. This book was released on 2013-03-09 with total page 152 pages. Available in PDF, EPUB and Kindle. Book excerpt: Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.

Progress in VLSI Design and Test

Author : Hafizur Rahaman
Publisher : Springer
ISBN 13 : 3642314945
Total Pages : 427 pages
Book Rating : 4.6/5 (423 download)

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Book Synopsis Progress in VLSI Design and Test by : Hafizur Rahaman

Download or read book Progress in VLSI Design and Test written by Hafizur Rahaman and published by Springer. This book was released on 2012-06-26 with total page 427 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book constitutes the refereed proceedings of the 16th International Symposium on VSLI Design and Test, VDAT 2012, held in Shibpur, India, in July 2012. The 30 revised regular papers presented together with 10 short papers and 13 poster sessions were carefully selected from 135 submissions. The papers are organized in topical sections on VLSI design, design and modeling of digital circuits and systems, testing and verification, design for testability, testing memories and regular logic arrays, embedded systems: hardware/software co-design and verification, emerging technology: nanoscale computing and nanotechnology.

IDDQ Testing of VLSI Circuits

Author : Ravi K. Gulati
Publisher : Springer Science & Business Media
ISBN 13 : 1461531462
Total Pages : 121 pages
Book Rating : 4.4/5 (615 download)

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Book Synopsis IDDQ Testing of VLSI Circuits by : Ravi K. Gulati

Download or read book IDDQ Testing of VLSI Circuits written by Ravi K. Gulati and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 121 pages. Available in PDF, EPUB and Kindle. Book excerpt: Power supply current monitoring to detect CMOS IC defects during production testing quietly laid down its roots in the mid-1970s. Both Sandia Labs and RCA in the United States and Philips Labs in the Netherlands practiced this procedure on their CMOS ICs. At that time, this practice stemmed simply from an intuitive sense that CMOS ICs showing abnormal quiescent power supply current (IDDQ) contained defects. Later, this intuition was supported by data and analysis in the 1980s by Levi (RACD, Malaiya and Su (SUNY-Binghamton), Soden and Hawkins (Sandia Labs and the University of New Mexico), Jacomino and co-workers (Laboratoire d'Automatique de Grenoble), and Maly and co-workers (Carnegie Mellon University). Interest in IDDQ testing has advanced beyond the data reported in the 1980s and is now focused on applications and evaluations involving larger volumes of ICs that improve quality beyond what can be achieved by previous conventional means. In the conventional style of testing one attempts to propagate the logic states of the suspended nodes to primary outputs. This is done for all or most nodes of the circuit. For sequential circuits, in particular, the complexity of finding suitable tests is very high. In comparison, the IDDQ test does not observe the logic states, but measures the integrated current that leaks through all gates. In other words, it is like measuring a patient's temperature to determine the state of health. Despite perceived advantages, during the years that followed its initial announcements, skepticism about the practicality of IDDQ testing prevailed. The idea, however, provided a great opportunity to researchers. New results on test generation, fault simulation, design for testability, built-in self-test, and diagnosis for this style of testing have since been reported. After a decade of research, we are definitely closer to practice.

IEEE 2000 First International Symposium on Quality Electronic Design

Author :
Publisher :
ISBN 13 : 9780769505251
Total Pages : 554 pages
Book Rating : 4.5/5 (52 download)

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Book Synopsis IEEE 2000 First International Symposium on Quality Electronic Design by :

Download or read book IEEE 2000 First International Symposium on Quality Electronic Design written by and published by . This book was released on 2000 with total page 554 pages. Available in PDF, EPUB and Kindle. Book excerpt:

System-level Test and Validation of Hardware/Software Systems

Author : Matteo Sonza Reorda
Publisher : Springer Science & Business Media
ISBN 13 : 1846281458
Total Pages : 187 pages
Book Rating : 4.8/5 (462 download)

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Book Synopsis System-level Test and Validation of Hardware/Software Systems by : Matteo Sonza Reorda

Download or read book System-level Test and Validation of Hardware/Software Systems written by Matteo Sonza Reorda and published by Springer Science & Business Media. This book was released on 2006-03-30 with total page 187 pages. Available in PDF, EPUB and Kindle. Book excerpt: New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers. SOC is also reshaping approaches to test and validation activities. These are beginning to migrate from the traditional register-transfer or gate levels of abstraction to the system level. Until now, test and validation have not been supported by system-level design tools so designers have lacked the infrastructure to exploit all the benefits stemming from the adoption of the system level of abstraction. Research efforts are already addressing this issue. This monograph provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including: modeling of bugs and defects; stimulus generation for validation and test purposes (including timing errors; design for testability.

Models in Hardware Testing

Author : Hans-Joachim Wunderlich
Publisher : Springer Science & Business Media
ISBN 13 : 9048132827
Total Pages : 263 pages
Book Rating : 4.0/5 (481 download)

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Book Synopsis Models in Hardware Testing by : Hans-Joachim Wunderlich

Download or read book Models in Hardware Testing written by Hans-Joachim Wunderlich and published by Springer Science & Business Media. This book was released on 2009-11-12 with total page 263 pages. Available in PDF, EPUB and Kindle. Book excerpt: Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.

Nanometer Technology Designs

Author : Nisar Ahmed
Publisher : Springer Science & Business Media
ISBN 13 : 0387757287
Total Pages : 288 pages
Book Rating : 4.3/5 (877 download)

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Book Synopsis Nanometer Technology Designs by : Nisar Ahmed

Download or read book Nanometer Technology Designs written by Nisar Ahmed and published by Springer Science & Business Media. This book was released on 2010-02-26 with total page 288 pages. Available in PDF, EPUB and Kindle. Book excerpt: Traditional at-speed test methods cannot guarantee high quality test results as they face many new challenges. Supply noise effects on chip performance, high test pattern volume, small delay defect test pattern generation, high cost of test implementation and application, and utilizing low-cost testers are among these challenges. This book discusses these challenges in detail and proposes new techniques and methodologies to improve the overall quality of the transition fault test.