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Circuit And Layout Techniques For Soft Error Resilient Digital Cmos Circuits
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Book Synopsis Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits by : Hsiao-Heng Kelin Lee
Download or read book Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits written by Hsiao-Heng Kelin Lee and published by Stanford University. This book was released on 2011 with total page 156 pages. Available in PDF, EPUB and Kindle. Book excerpt: Radiation-induced soft errors are a major concern for modern digital circuits, especially memory elements. Unlike large Random Access Memories that can be protected using error-correcting codes and bit interleaving, soft error protection of sequential elements, i.e. latches and flip-flops, is challenging. Traditional techniques for designing soft-error-resilient sequential elements generally address single node errors, or Single Event Upsets (SEUs). However, with technology scaling, the charge deposited by a single particle strike can be simultaneously collected and shared by multiple circuit nodes, resulting in Single Event Multiple Upsets (SEMUs). In this work, we target SEMUs by presenting a design framework for soft-error-resilient sequential cell design with an overview of existing circuit and layout techniques for soft error mitigation, and introducing a new soft error resilience layout design principle called LEAP, or Layout Design through Error-Aware Transistor Positioning. We then discuss our application of LEAP to the SEU-immune Dual Interlocked Storage Cell (DICE) by implementing a new sequential element layout called LEAP-DICE, retaining the original DICE circuit topology. We compare the soft error performance of SEU-immune flip-flops with the LEAP-DICE flip-flop using a test chip in 180nm CMOS under 200-MeV proton radiation and conclude that 1) our LEAP-DICE flip-flop encounters on average 2,000X and 5X fewer errors compared to a conventional D flip-flop and our reference DICE flip-flop, respectively; 2) our LEAP-DICE flip-flop has the best soft error performance among all existing SEU-immune flip-flops; 3) In the evaluation of our design framework, we also discovered new soft error effects related to operating conditions such as voltage scaling, clock frequency setting and radiation dose.
Book Synopsis Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits by : Hsiao-Heng Kelin Lee
Download or read book Circuit and Layout Techniques for Soft-error-resilient Digital CMOS Circuits written by Hsiao-Heng Kelin Lee and published by . This book was released on 2011 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: Radiation-induced soft errors are a major concern for modern digital circuits, especially memory elements. Unlike large Random Access Memories that can be protected using error-correcting codes and bit interleaving, soft error protection of sequential elements, i.e. latches and flip-flops, is challenging. Traditional techniques for designing soft-error-resilient sequential elements generally address single node errors, or Single Event Upsets (SEUs). However, with technology scaling, the charge deposited by a single particle strike can be simultaneously collected and shared by multiple circuit nodes, resulting in Single Event Multiple Upsets (SEMUs). In this work, we target SEMUs by presenting a design framework for soft-error-resilient sequential cell design with an overview of existing circuit and layout techniques for soft error mitigation, and introducing a new soft error resilience layout design principle called LEAP, or Layout Design through Error-Aware Transistor Positioning. We then discuss our application of LEAP to the SEU-immune Dual Interlocked Storage Cell (DICE) by implementing a new sequential element layout called LEAP-DICE, retaining the original DICE circuit topology. We compare the soft error performance of SEU-immune flip-flops with the LEAP-DICE flip-flop using a test chip in 180nm CMOS under 200-MeV proton radiation and conclude that 1) our LEAP-DICE flip-flop encounters on average 2,000X and 5X fewer errors compared to a conventional D flip-flop and our reference DICE flip-flop, respectively; 2) our LEAP-DICE flip-flop has the best soft error performance among all existing SEU-immune flip-flops; 3) In the evaluation of our design framework, we also discovered new soft error effects related to operating conditions such as voltage scaling, clock frequency setting and radiation dose.
Book Synopsis Digital CMOS Circuit Design by : Silvia Annaratone
Download or read book Digital CMOS Circuit Design written by Silvia Annaratone and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 367 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Book Synopsis Theory of CMOS Digital Circuits and Circuit Failures by : Masakazu Shoji
Download or read book Theory of CMOS Digital Circuits and Circuit Failures written by Masakazu Shoji and published by Princeton University Press. This book was released on 2014-07-14 with total page 589 pages. Available in PDF, EPUB and Kindle. Book excerpt: CMOS chips are becoming increasingly important in computer circuitry. They have been widely used during the past decade, and they will continue to grow in popularity in those application areas that demand high performance. Challenging the prevailing opinion that circuit simulation can reveal all problems in CMOS circuits, Masakazu Shoji maintains that simulation cannot completely remove the often costly errors that occur in circuit design. To address the failure modes of these circuits more fully, he presents a new approach to CMOS circuit design based on his systematizing of circuit design error and his unique theory of CMOS digital circuit operation. In analyzing CMOS digital circuits, the author focuses not on effects originating from the characteristics of the device (MOSFET) but on those arising from their connection. This emphasis allows him to formulate a powerful but ultimately simple theory explaining the effects of connectivity by using a concept of the states of the circuits, called microstates. Shoji introduces microstate sequence diagrams that describe the state changes (or the circuit connectivity changes), and he uses his microstate theory to analyze many of the conventional CMOS digital circuits. These analyses are practically all in closed-form, and they provide easy physical interpretation of the circuit's working mechanisms, the parametric dependence of performance, and the circuit's failure modes. Originally published in 1992. The Princeton Legacy Library uses the latest print-on-demand technology to again make available previously out-of-print books from the distinguished backlist of Princeton University Press. These editions preserve the original texts of these important books while presenting them in durable paperback and hardcover editions. The goal of the Princeton Legacy Library is to vastly increase access to the rich scholarly heritage found in the thousands of books published by Princeton University Press since its founding in 1905.
Download or read book Soft Errors written by Jean-Luc Autran and published by CRC Press. This book was released on 2017-12-19 with total page 532 pages. Available in PDF, EPUB and Kindle. Book excerpt: Soft errors are a multifaceted issue at the crossroads of applied physics and engineering sciences. Soft errors are by nature multiscale and multiphysics problems that combine not only nuclear and semiconductor physics, material sciences, circuit design, and chip architecture and operation, but also cosmic-ray physics, natural radioactivity issues, particle detection, and related instrumentation. Soft Errors: From Particles to Circuits addresses the problem of soft errors in digital integrated circuits subjected to the terrestrial natural radiation environment—one of the most important primary limits for modern digital electronic reliability. Covering the fundamentals of soft errors as well as engineering considerations and technological aspects, this robust text: Discusses the basics of the natural radiation environment, particle interactions with matter, and soft-error mechanisms Details instrumentation developments in the fields of environment characterization, particle detection, and real-time and accelerated tests Describes the latest computational developments, modeling, and simulation strategies for the soft error-rate estimation in digital circuits Explores trends for future technological nodes and emerging devices Soft Errors: From Particles to Circuits presents the state of the art of this complex subject, providing comprehensive knowledge of the complete chain of the physics of soft errors. The book makes an ideal text for introductory graduate-level courses, offers academic researchers a specialized overview, and serves as a practical guide for semiconductor industry engineers or application engineers.
Book Synopsis Multi-voltage CMOS Circuit Design by : Volkan Kursun
Download or read book Multi-voltage CMOS Circuit Design written by Volkan Kursun and published by John Wiley & Sons. This book was released on 2006-08-30 with total page 242 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book presents an in-depth treatment of various power reduction and speed enhancement techniques based on multiple supply and threshold voltages. A detailed discussion of the sources of power consumption in CMOS circuits will be provided whilst focusing primarily on identifying the mechanisms by which sub-threshold and gate oxide leakage currents are generated. The authors present a comprehensive review of state-of-the-art dynamic, static supply and threshold voltage scaling techniques and discuss the pros and cons of supply and threshold voltage scaling techniques.
Book Synopsis Techniques for Power and Reliability Optimization of Cmos Logic by : Abdulkadir Utku Diril
Download or read book Techniques for Power and Reliability Optimization of Cmos Logic written by Abdulkadir Utku Diril and published by LAP Lambert Academic Publishing. This book was released on 2012-02 with total page 108 pages. Available in PDF, EPUB and Kindle. Book excerpt: As the transistors became smaller in size and the systems became faster, issues like power consumption, signal integrity, soft error tolerance, and testing became serious challenges. There is an increasing demand to put CAD tools in the design flow to address these issues at every step of the design process. First part of this research investigates circuit level techniques to reduce power consumption in digital systems. In second part, improving soft error tolerance of digital systems is considered as a trade off problem between power and reliability and a power aware dynamic soft error tolerance control strategy is developed. The objective of this research is to provide CAD tools and circuit design techniques to optimize power consumption and to increase soft error tolerance of digital circuits. Multiple supply and threshold voltages are used to reduce power consumption. Variable supply and threshold voltages are used together with variable capacitances to develop a dynamic soft error tolerance control scheme.
Book Synopsis Testing and Reliable Design of CMOS Circuits by : Niraj K. Jha
Download or read book Testing and Reliable Design of CMOS Circuits written by Niraj K. Jha and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 239 pages. Available in PDF, EPUB and Kindle. Book excerpt: In the last few years CMOS technology has become increas ingly dominant for realizing Very Large Scale Integrated (VLSI) circuits. The popularity of this technology is due to its high den sity and low power requirement. The ability to realize very com plex circuits on a single chip has brought about a revolution in the world of electronics and computers. However, the rapid advance ments in this area pose many new problems in the area of testing. Testing has become a very time-consuming process. In order to ease the burden of testing, many schemes for designing the circuit for improved testability have been presented. These design for testability techniques have begun to catch the attention of chip manufacturers. The trend is towards placing increased emphasis on these techniques. Another byproduct of the increase in the complexity of chips is their higher susceptibility to faults. In order to take care of this problem, we need to build fault-tolerant systems. The area of fault-tolerant computing has steadily gained in importance. Today many universities offer courses in the areas of digital system testing and fault-tolerant computing. Due to the impor tance of CMOS technology, a significant portion of these courses may be devoted to CMOS testing. This book has been written as a reference text for such courses offered at the senior or graduate level. Familiarity with logic design and switching theory is assumed. The book should also prove to be useful to professionals working in the semiconductor industry.
Book Synopsis CMOS Logic Circuit Design by : John P. Uyemura
Download or read book CMOS Logic Circuit Design written by John P. Uyemura and published by Springer Science & Business Media. This book was released on 2007-05-08 with total page 542 pages. Available in PDF, EPUB and Kindle. Book excerpt: This is an up-to-date treatment of the analysis and design of CMOS integrated digital logic circuits. The self-contained book covers all of the important digital circuit design styles found in modern CMOS chips, emphasizing solving design problems using the various logic styles available in CMOS.
Book Synopsis Hierarchical Optimization of Digital CMOS Circuits for Power, Performance and Reliability by : Yuvraj Singh Dhillon
Download or read book Hierarchical Optimization of Digital CMOS Circuits for Power, Performance and Reliability written by Yuvraj Singh Dhillon and published by . This book was released on 2005 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: Power consumption and soft-error tolerance have become major constraints in the design of DSM CMOS circuits. With continued technology scaling, the impact of these parameters is expected to gain in significance. Furthermore, the design complexity continues to increase rapidly due to the tremendous increase in number of components (gates/transistors) on an IC every technology generation. This research describes an efficient and general CAD framework for the optimization of critical circuit characteristics such as power consumption and soft-error tolerance under delay constraints with supply/threshold voltages and/or gate sizes as variables. A general technique called Delay-Assignment-Variation (DAV) based optimization was formulated for the delay-constrained optimization of directed acyclic graphs. Exact mathematical conditions on the supply and threshold voltages of circuit modules were developed that lead to minimum overall dynamic and static power consumption of the circuit under delay constraints. A DAV search based method was used to obtain the optimal supply and threshold voltages that minimized power consumption. To handle the complexity of design of reliable, low-power circuits at the gate level, a hierarchical application of DAV based optimization was explored. The effectiveness of the hierarchical approach in reducing circuit power and unreliability, while being highly efficient is demonstrated. The usage of the technique for improving upon already optimized designs is described. An accurate and efficient model for analyzing the soft-error tolerance of CMOS circuits is also developed.
Book Synopsis Circuit Design for CMOS VLSI by : John P. Uyemura
Download or read book Circuit Design for CMOS VLSI written by John P. Uyemura and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 461 pages. Available in PDF, EPUB and Kindle. Book excerpt: During the last decade, CMOS has become increasingly attractive as a basic integrated circuit technology due to its low power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a variety of CMOS circuit styles, some based on static complementary con ductance properties, but others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines for precharge-evaluate se quencing. In this comprehensive book, the reader is led systematically through the entire range of CMOS circuit design. Starting with the in dividual MOSFET, basic circuit building blocks are described, leading to a broad view of both combinatorial and sequential circuits. Once these circuits are considered in the light of CMOS process technologies, impor tant topics in circuit performance are considered, including characteristics of interconnect, gate delay, device sizing, and I/O buffering. Basic circuits are then composed to form macro elements such as multipliers, where the reader acquires a unified view of architectural performance through par allelism, and circuit performance through careful attention to circuit-level and layout design optimization. Topics in analog circuit design reflect the growing tendency for both analog and digital circuit forms to be combined on the same chip, and a careful treatment of BiCMOS forms introduces the reader to the combination of both FET and bipolar technologies on the same chip to provide improved performance.
Book Synopsis Analysis and Design of Resilient VLSI Circuits by : Rajesh Garg
Download or read book Analysis and Design of Resilient VLSI Circuits written by Rajesh Garg and published by Springer Science & Business Media. This book was released on 2009-10-22 with total page 224 pages. Available in PDF, EPUB and Kindle. Book excerpt: This monograph is motivated by the challenges faced in designing reliable VLSI systems in modern VLSI processes. The reliable operation of integrated circuits (ICs) has become increasingly dif?cult to achieve in the deep submicron (DSM) era. With continuouslydecreasing device feature sizes, combinedwith lower supply voltages and higher operating frequencies, the noise immunity of VLSI circuits is decreasing alarmingly. Thus, VLSI circuits are becoming more vulnerable to noise effects such as crosstalk, power supply variations, and radiation-inducedsoft errors. Among these noise sources, soft errors(or error caused by radiation particle strikes) have become an increasingly troublesome issue for memory arrays as well as c- binational logic circuits. Also, in the DSM era, process variations are increasing at a signi?cant rate, making it more dif?cult to design reliable VLSI circuits. Hence, it is important to ef?ciently design robust VLSI circuits that are resilient to radiation particle strikes and process variations. The work presented in this research mo- graph presents several analysis and design techniques with the goal of realizing VLSI circuits, which are radiation and process variation tolerant.
Book Synopsis Low-Power CMOS Circuits by : Christian Piguet
Download or read book Low-Power CMOS Circuits written by Christian Piguet and published by CRC Press. This book was released on 2018-10-03 with total page 438 pages. Available in PDF, EPUB and Kindle. Book excerpt: The power consumption of microprocessors is one of the most important challenges of high-performance chips and portable devices. In chapters drawn from Piguet's recently published Low-Power Electronics Design, Low-Power CMOS Circuits: Technology, Logic Design, and CAD Tools addresses the design of low-power circuitry in deep submicron technologies. It provides a focused reference for specialists involved in designing low-power circuitry, from transistors to logic gates. The book is organized into three broad sections for convenient access. The first examines the history of low-power electronics along with a look at emerging and possible future technologies. It also considers other technologies, such as nanotechnologies and optical chips, that may be useful in designing integrated circuits. The second part explains the techniques used to reduce power consumption at low levels. These include clock gating, leakage reduction, interconnecting and communication on chips, and adiabatic circuits. The final section discusses various CAD tools for designing low-power circuits. This section includes three chapters that demonstrate the tools and low-power design issues at three major companies that produce logic synthesizers. Providing detailed examinations contributed by leading experts, Low-Power CMOS Circuits: Technology, Logic Design, and CAD Tools supplies authoritative information on how to design and model for high performance with low power consumption in modern integrated circuits. It is a must-read for anyone designing modern computers or embedded systems.
Book Synopsis Handbook of Digital CMOS Technology, Circuits, and Systems by : Karim Abbas
Download or read book Handbook of Digital CMOS Technology, Circuits, and Systems written by Karim Abbas and published by Springer Nature. This book was released on 2020-01-14 with total page 653 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides a comprehensive reference for everything that has to do with digital circuits. The author focuses equally on all levels of abstraction. He tells a bottom-up story from the physics level to the finished product level. The aim is to provide a full account of the experience of designing, fabricating, understanding, and testing a microchip. The content is structured to be very accessible and self-contained, allowing readers with diverse backgrounds to read as much or as little of the book as needed. Beyond a basic foundation of mathematics and physics, the book makes no assumptions about prior knowledge. This allows someone new to the field to read the book from the beginning. It also means that someone using the book as a reference will be able to answer their questions without referring to any external sources.
Book Synopsis CMOS, Circuit Design, Layout, and Simulation by : R. Jacob Baker
Download or read book CMOS, Circuit Design, Layout, and Simulation written by R. Jacob Baker and published by Wiley-IEEE Press. This book was released on 1997-08-22 with total page 944 pages. Available in PDF, EPUB and Kindle. Book excerpt: "This exceptionally comprehensive tutorial presentation of complementary metal oxide semiconductor (CMOS) integrated circuits will guide you through the process of implementing a chip from the physical definition through the design and simulation of the finished chip. CMOS: CIRCUIT DESIGN, LAYOUT, AND SIMULATION provides an important contemporary view of a wide range of circuit blocks, the BSIM model, data converter architectures, and much more. Outstanding features of this text include: * Phase- and delay-locked loops, mixed-signal circuits, and data converters * More than 1,000 figures, 200 examples, and over 500 end-of-chapter problems * In-depth coverage of both analog and digital circuit-level design techniques * Real-world process parameters and design rules * Information on MOSIS fabrication procedures, and other key topics of interest * Information and directions on submitting chips of MOSIS * Tutorial presentation of material suitable for self study or as a university textbook * Numerous examples and homework problems For more information and links related to CMOS design, go to http://cmosedu.com. Professors: To request an examination copy simply e-mail [email protected]." Sponsored by: IEEE Solid-State Circuits Council/Society, IEEE Circuits and Systems Society.
Book Synopsis Terrestrial Radiation Effects in ULSI Devices and Electronic Systems by : Eishi H. Ibe
Download or read book Terrestrial Radiation Effects in ULSI Devices and Electronic Systems written by Eishi H. Ibe and published by John Wiley & Sons. This book was released on 2015-03-02 with total page 292 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides the reader with knowledge on a wide variety of radiation fields and their effects on the electronic devices and systems. The author covers faults and failures in ULSI devices induced by a wide variety of radiation fields, including electrons, alpha-rays, muons, gamma rays, neutrons and heavy ions. Readers will learn how to make numerical models from physical insights, to determine the kind of mathematical approaches that should be implemented to analyze radiation effects. A wide variety of prediction, detection, characterization and mitigation techniques against soft-errors are reviewed and discussed. The author shows how to model sophisticated radiation effects in condensed matter in order to quantify and control them, and explains how electronic systems including servers and routers are shut down due to environmental radiation. Provides an understanding of how electronic systems are shut down due to environmental radiation by constructing physical models and numerical algorithms Covers both terrestrial and avionic-level conditions Logically presented with each chapter explaining the background physics to the topic followed by various modelling techniques, and chapter summary Written by a widely-recognized authority in soft-errors in electronic devices Code samples available for download from the Companion Website This book is targeted at researchers and graduate students in nuclear and space radiation, semiconductor physics and electron devices, as well as other areas of applied physics modelling. Researchers and students interested in how a variety of physical phenomena can be modelled and numerically treated will also find this book to present helpful methods.
Book Synopsis Extreme Environment Electronics by : John D. Cressler
Download or read book Extreme Environment Electronics written by John D. Cressler and published by CRC Press. This book was released on 2017-12-19 with total page 1041 pages. Available in PDF, EPUB and Kindle. Book excerpt: Unfriendly to conventional electronic devices, circuits, and systems, extreme environments represent a serious challenge to designers and mission architects. The first truly comprehensive guide to this specialized field, Extreme Environment Electronics explains the essential aspects of designing and using devices, circuits, and electronic systems intended to operate in extreme environments, including across wide temperature ranges and in radiation-intense scenarios such as space. The Definitive Guide to Extreme Environment Electronics Featuring contributions by some of the world’s foremost experts in extreme environment electronics, the book provides in-depth information on a wide array of topics. It begins by describing the extreme conditions and then delves into a description of suitable semiconductor technologies and the modeling of devices within those technologies. It also discusses reliability issues and failure mechanisms that readers need to be aware of, as well as best practices for the design of these electronics. Continuing beyond just the "paper design" of building blocks, the book rounds out coverage of the design realization process with verification techniques and chapters on electronic packaging for extreme environments. The final set of chapters describes actual chip-level designs for applications in energy and space exploration. Requiring only a basic background in electronics, the book combines theoretical and practical aspects in each self-contained chapter. Appendices supply additional background material. With its broad coverage and depth, and the expertise of the contributing authors, this is an invaluable reference for engineers, scientists, and technical managers, as well as researchers and graduate students. A hands-on resource, it explores what is required to successfully operate electronics in the most demanding conditions.
