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Author :
Publisher :
ISBN 13 :
Total Pages : 448 pages
Book Rating : 4.F/5 ( download)
Download or read book Electrical Overstress/Electrostatic Discharge Symposium Proceedings written by and published by . This book was released on 2004 with total page 448 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 0470747269
Total Pages : 411 pages
Book Rating : 4.4/5 (77 download)
Download or read book ESD written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2009-07-01 with total page 411 pages. Available in PDF, EPUB and Kindle. Book excerpt: Electrostatic discharge (ESD) failure mechanisms continue to impact semiconductor components and systems as technologies scale from micro- to nano-electronics. This book studies electrical overstress, ESD, and latchup from a failure analysis and case-study approach. It provides a clear insight into the physics of failure from a generalist perspective, followed by investigation of failure mechanisms in specific technologies, circuits, and systems. The book is unique in covering both the failure mechanism and the practical solutions to fix the problem from either a technology or circuit methodology. Look inside for extensive coverage on: failure analysis tools, EOS and ESD failure sources and failure models of semiconductor technology, and how to use failure analysis to design more robust semiconductor components and systems; electro-thermal models and technologies; the state-of-the-art technologies discussed include CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, smart power, gallium arsenide (GaAs), gallium nitride (GaN), magneto-resistive (MR) , giant magneto-resistors (GMR), tunneling magneto-resistor (TMR), devices; micro electro-mechanical (MEM) systems, and photo-masks and reticles; practical methods to use failure analysis for the understanding of ESD circuit operation, temperature analysis, power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics, (connecting the theoretical to the practical analysis); the failure of each key element of a technology from passives, active elements to the circuit, sub-system to package, highlighted by case studies of the elements, circuits and system-on-chip (SOC) in today’s products. ESD: Failure Mechanisms and Models is a continuation of the author’s series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic era.
Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 0470511915
Total Pages : 323 pages
Book Rating : 4.4/5 (75 download)
Download or read book ESD Testing written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2016-12-19 with total page 323 pages. Available in PDF, EPUB and Kindle. Book excerpt: With the evolution of semiconductor technology and global diversification of the semiconductor business, testing of semiconductor devices to systems for electrostatic discharge (ESD) and electrical overstress (EOS) has increased in importance. ESD Testing: From Components to Systems updates the reader in the new tests, test models, and techniques in the characterization of semiconductor components for ESD, EOS, and latchup. Key features: Provides understanding and knowledge of ESD models and specifications including human body model (HBM), machine model (MM), charged device model (CDM), charged board model (CBM), cable discharge events (CDE), human metal model (HMM), IEC 61000-4-2 and IEC 61000-4-5. Discusses new testing methodologies such as transmission line pulse (TLP), to very fast transmission line pulse (VF-TLP), and future methods of long pulse TLP, to ultra-fast TLP (UF-TLP). Describes both conventional testing and new testing techniques for both chip and system level evaluation. Addresses EOS testing, electromagnetic compatibility (EMC) scanning, to current reconstruction methods. Discusses latchup characterization and testing methodologies for evaluation of semiconductor technology to product testing. ESD Testing: From Components to Systems is part of the authors’ series of books on electrostatic discharge (ESD) protection; this book will be an invaluable reference for the professional semiconductor chip and system-level ESD and EOS test engineer. Semiconductor device and process development, circuit designers, quality, reliability and failure analysis engineers will also find it an essential reference. In addition, its academic treatment will appeal to both senior and graduate students with interests in semiconductor process, device physics, semiconductor testing and experimental work.
Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 1119965179
Total Pages : 1172 pages
Book Rating : 4.1/5 (199 download)
Download or read book The ESD Handbook written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2021-04-12 with total page 1172 pages. Available in PDF, EPUB and Kindle. Book excerpt: A practical and comprehensive reference that explores Electrostatic Discharge (ESD) in semiconductor components and electronic systems The ESD Handbook offers a comprehensive reference that explores topics relevant to ESD design in semiconductor components and explores ESD in various systems. Electrostatic discharge is a common problem in the semiconductor environment and this reference fills a gap in the literature by discussing ESD protection. Written by a noted expert on the topic, the text offers a topic-by-topic reference that includes illustrative figures, discussions, and drawings. The handbook covers a wide-range of topics including ESD in manufacturing (garments, wrist straps, and shoes); ESD Testing; ESD device physics; ESD semiconductor process effects; ESD failure mechanisms; ESD circuits in different technologies (CMOS, Bipolar, etc.); ESD circuit types (Pin, Power, Pin-to-Pin, etc.); and much more. In addition, the text includes a glossary, index, tables, illustrations, and a variety of case studies. Contains a well-organized reference that provides a quick review on a range of ESD topics Fills the gap in the current literature by providing information from purely scientific and physical aspects to practical applications Offers information in clear and accessible terms Written by the accomplished author of the popular ESD book series Written for technicians, operators, engineers, circuit designers, and failure analysis engineers, The ESD Handbook contains an accessible reference to ESD design and ESD systems.
Author : Stephen J. Gaul
Publisher : John Wiley & Sons
ISBN 13 : 1118701879
Total Pages : 392 pages
Book Rating : 4.1/5 (187 download)
Download or read book Integrated Circuit Design for Radiation Environments written by Stephen J. Gaul and published by John Wiley & Sons. This book was released on 2019-12-03 with total page 392 pages. Available in PDF, EPUB and Kindle. Book excerpt: A practical guide to the effects of radiation on semiconductor components of electronic systems, and techniques for the designing, laying out, and testing of hardened integrated circuits This book teaches the fundamentals of radiation environments and their effects on electronic components, as well as how to design, lay out, and test cost-effective hardened semiconductor chips not only for today’s space systems but for commercial terrestrial applications as well. It provides a historical perspective, the fundamental science of radiation, and the basics of semiconductors, as well as radiation-induced failure mechanisms in semiconductor chips. Integrated Circuits Design for Radiation Environments starts by introducing readers to semiconductors and radiation environments (including space, atmospheric, and terrestrial environments) followed by circuit design and layout. The book introduces radiation effects phenomena including single-event effects, total ionizing dose damage and displacement damage) and shows how technological solutions can address both phenomena. Describes the fundamentals of radiation environments and their effects on electronic components Teaches readers how to design, lay out and test cost-effective hardened semiconductor chips for space systems and commercial terrestrial applications Covers natural and man-made radiation environments, space systems and commercial terrestrial applications Provides up-to-date coverage of state-of-the-art of radiation hardening technology in one concise volume Includes questions and answers for the reader to test their knowledge Integrated Circuits Design for Radiation Environments will appeal to researchers and product developers in the semiconductor, space, and defense industries, as well as electronic engineers in the medical field. The book is also helpful for system, layout, process, device, reliability, applications, ESD, latchup and circuit design semiconductor engineers, along with anyone involved in micro-electronics used in harsh environments.
Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 1118703332
Total Pages : 368 pages
Book Rating : 4.1/5 (187 download)
Download or read book Electrical Overstress (EOS) written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2013-08-27 with total page 368 pages. Available in PDF, EPUB and Kindle. Book excerpt: Electrical Overstress (EOS) continues to impact semiconductor manufacturing, semiconductor components and systems as technologies scale from micro- to nano-electronics. This bookteaches the fundamentals of electrical overstress and how to minimize and mitigate EOS failures. The text provides a clear picture of EOS phenomena, EOS origins, EOS sources, EOS physics, EOS failure mechanisms, and EOS on-chip and system design. It provides an illuminating insight into the sources of EOS in manufacturing, integration of on-chip, and system level EOS protection networks, followed by examples in specific technologies, circuits, and chips. The book is unique in covering the EOS manufacturing issues from on-chip design and electronic design automation to factory-level EOS program management in today’s modern world. Look inside for extensive coverage on: Fundamentals of electrical overstress, from EOS physics, EOS time scales, safe operating area (SOA), to physical models for EOS phenomena EOS sources in today’s semiconductor manufacturing environment, and EOS program management, handling and EOS auditing processing to avoid EOS failures EOS failures in both semiconductor devices, circuits and system Discussion of how to distinguish between EOS events, and electrostatic discharge (ESD) events (e.g. such as human body model (HBM), charged device model (CDM), cable discharge events (CDM), charged board events (CBE), to system level IEC 61000-4-2 test events) EOS protection on-chip design practices and how they differ from ESD protection networks and solutions Discussion of EOS system level concerns in printed circuit boards (PCB), and manufacturing equipment Examples of EOS issues in state-of-the-art digital, analog and power technologies including CMOS, LDMOS, and BCD EOS design rule checking (DRC), LVS, and ERC electronic design automation (EDA) and how it is distinct from ESD EDA systems EOS testing and qualification techniques, and Practical off-chip ESD protection and system level solutions to provide more robust systems Electrical Overstress (EOS): Devices, Circuits and Systems is a continuation of the author’s series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the nano-electronic era.
Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 0470979712
Total Pages : 244 pages
Book Rating : 4.4/5 (79 download)
Download or read book ESD Basics written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2012-10-22 with total page 244 pages. Available in PDF, EPUB and Kindle. Book excerpt: Electrostatic discharge (ESD) continues to impact semiconductor manufacturing, semiconductor components and systems, as technologies scale from micro- to nano electronics. This book introduces the fundamentals of ESD, electrical overstress (EOS), electromagnetic interference (EMI), electromagnetic compatibility (EMC), and latchup, as well as provides a coherent overview of the semiconductor manufacturing environment and the final system assembly. It provides an illuminating look into the integration of ESD protection networks followed by examples in specific technologies, circuits, and chips. The text is unique in covering semiconductor chip manufacturing issues, ESD semiconductor chip design, and system problems confronted today as well as the future of ESD phenomena and nano-technology. Look inside for extensive coverage on: The fundamentals of electrostatics, triboelectric charging, and how they relate to present day manufacturing environments of micro-electronics to nano-technology Semiconductor manufacturing handling and auditing processing to avoid ESD failures ESD, EOS, EMI, EMC, and latchup semiconductor component and system level testing to demonstrate product resilience from human body model (HBM), transmission line pulse (TLP), charged device model (CDM), human metal model (HMM), cable discharge events (CDE), to system level IEC 61000-4-2 tests ESD on-chip design and process manufacturing practices and solutions to improve ESD semiconductor chip solutions, also practical off-chip ESD protection and system level solutions to provide more robust systems System level concerns in servers, laptops, disk drives, cell phones, digital cameras, hand held devices, automobiles, and space applications Examples of ESD design for state-of-the-art technologies, including CMOS, BiCMOS, SOI, bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, smart power, magnetic recording technology, micro-machines (MEMs) to nano-structures ESD Basics: From Semiconductor Manufacturing to Product Use complements the author’s series of books on ESD protection. For those new to the field, it is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic Era.
Author : Takafumi Nakamura
Publisher : BoD – Books on Demand
ISBN 13 : 1789230462
Total Pages : 126 pages
Book Rating : 4.7/5 (892 download)
Download or read book System of System Failures written by Takafumi Nakamura and published by BoD – Books on Demand. This book was released on 2018-05-09 with total page 126 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book provides the application of praxises in the field of engineering safety by learning from previous system failures. And it addresses the most recent developments in the theoretical and practical aspects of these important fields, which, due to their special nature, bring together in a systematic way, many disciplines of engineering, from the traditional to the most technologically advanced. The authors of these chapters are involved in using the system thinking and system engineering approaches at the scale of increased complexity and advanced computational solutions to such systems. The chapters cover the areas such as failure assessment in aeronautical engineering, seismic resistance of offshore pipeline engineering, electrical engineering, critical infrastructure failure, and system of system theory.
Author : Steven H. Voldman
Publisher : John Wiley & Sons
ISBN 13 : 9780470516164
Total Pages : 472 pages
Book Rating : 4.5/5 (161 download)
Download or read book Latchup written by Steven H. Voldman and published by John Wiley & Sons. This book was released on 2008-04-15 with total page 472 pages. Available in PDF, EPUB and Kindle. Book excerpt: Interest in latchup is being renewed with the evolution of complimentary metal-oxide semiconductor (CMOS) technology, metal-oxide-semiconductor field-effect transistor (MOSFET) scaling, and high-level system-on-chip (SOC) integration. Clear methodologies that grant protection from latchup, with insight into the physics, technology and circuit issues involved, are in increasing demand. This book describes CMOS and BiCMOS semiconductor technology and their sensitivity to present day latchup phenomena, from basic over-voltage and over-current conditions, single event latchup (SEL) and cable discharge events (CDE), to latchup domino phenomena. It contains chapters focusing on bipolar physics, latchup theory, latchup and guard ring characterization structures, characterization testing, product level test systems, product level testing and experimental results. Discussions on state-of-the-art semiconductor processes, design layout, and circuit level and system level latchup solutions are also included, as well as: latchup semiconductor process solutions for both CMOS to BiCMOS, such as shallow trench, deep trench, retrograde wells, connecting implants, sub-collectors, heavily-doped buried layers, and buried grids – from single- to triple-well CMOS; practical latchup design methods, automated and bench-level latchup testing methods and techniques, latchup theory of logarithm resistance space, generalized alpha (a) space, beta (b) space, new latchup design methods– connecting the theoretical to the practical analysis, and; examples of latchup computer aided design (CAD) methodologies, from design rule checking (DRC) and logical-to-physical design, to new latchup CAD methodologies that address latchup for internal and external latchup on a local as well as global design level. Latchup acts as a companion text to the author’s series of books on ESD (electrostatic discharge) protection, serving as an invaluable reference for the professional semiconductor chip and system-level ESD engineer. Semiconductor device, process and circuit designers, and quality, reliability and failure analysis engineers will find it informative on the issues that confront modern CMOS technology. Practitioners in the automotive and aerospace industries will also find it useful. In addition, its academic treatment will appeal to both senior and graduate students with interests in semiconductor process, device physics, computer aided design and design integration.
Author : P. C. Chang
Publisher : The Electrochemical Society
ISBN 13 : 9781566774628
Total Pages : 500 pages
Book Rating : 4.7/5 (746 download)
Download or read book State-of-the-Art Program on Compound Semiconductors : (SOTAPOCS XLII) and Processes at the Compound-Semiconductor/Solution Interface written by P. C. Chang and published by The Electrochemical Society. This book was released on 2005 with total page 500 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Ming-Dou Ker
Publisher : John Wiley & Sons
ISBN 13 : 0470824085
Total Pages : 265 pages
Book Rating : 4.4/5 (78 download)
Download or read book Transient-Induced Latchup in CMOS Integrated Circuits written by Ming-Dou Ker and published by John Wiley & Sons. This book was released on 2009-07-23 with total page 265 pages. Available in PDF, EPUB and Kindle. Book excerpt: The book all semiconductor device engineers must read to gain a practical feel for latchup-induced failure to produce lower-cost and higher-density chips. Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process. Presents real cases and solutions that occur in commercial CMOS IC chips Equips engineers with the skills to conserve chip layout area and decrease time-to-market Written by experts with real-world experience in circuit design and failure analysis Distilled from numerous courses taught by the authors in IC design houses worldwide The only book to introduce TLU under system-level ESD and EFT tests This book is essential for practicing engineers involved in IC design, IC design management, system and application design, reliability, and failure analysis. Undergraduate and postgraduate students, specializing in CMOS circuit design and layout, will find this book to be a valuable introduction to real-world industry problems and a key reference during the course of their careers.
Author : Charvaka Duvvury
Publisher : John Wiley & Sons
ISBN 13 : 1118861884
Total Pages : 436 pages
Book Rating : 4.1/5 (188 download)
Download or read book System Level ESD Co-Design written by Charvaka Duvvury and published by John Wiley & Sons. This book was released on 2017-05-05 with total page 436 pages. Available in PDF, EPUB and Kindle. Book excerpt: An effective and cost efficient protection of electronic system against ESD stress pulses specified by IEC 61000-4-2 is paramount for any system design. This pioneering book presents the collective knowledge of system designers and system testing experts and state-of-the-art techniques for achieving efficient system-level ESD protection, with minimum impact on the system performance. All categories of system failures ranging from 'hard' to 'soft' types are considered to review simulation and tool applications that can be used. The principal focus of System Level ESD Co-Design is defining and establishing the importance of co-design efforts from both IC supplier and system builder perspectives. ESD designers often face challenges in meeting customers' system-level ESD requirements and, therefore, a clear understanding of the techniques presented here will facilitate effective simulation approaches leading to better solutions without compromising system performance. With contributions from Robert Ashton, Jeffrey Dunnihoo, Micheal Hopkins, Pratik Maheshwari, David Pomerenke, Wolfgang Reinprecht, and Matti Usumaki, readers benefit from hands-on experience and in-depth knowledge in topics ranging from ESD design and the physics of system ESD phenomena to tools and techniques to address soft failures and strategies to design ESD-robust systems that include mobile and automotive applications. The first dedicated resource to system-level ESD co-design, this is an essential reference for industry ESD designers, system builders, IC suppliers and customers and also Original Equipment Manufacturers (OEMs). Key features: Clarifies the concept of system level ESD protection. Introduces a co-design approach for ESD robust systems. Details soft and hard ESD fail mechanisms. Detailed protection strategies for both mobile and automotive applications. Explains simulation tools and methodology for system level ESD co-design and overviews available test methods and standards. Highlights economic benefits of system ESD co-design.
Author : Vladislav Vashchenko
Publisher : Springer Science & Business Media
ISBN 13 : 3319032216
Total Pages : 331 pages
Book Rating : 4.3/5 (19 download)
Download or read book System Level ESD Protection written by Vladislav Vashchenko and published by Springer Science & Business Media. This book was released on 2014-03-21 with total page 331 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations.
Author : Qiang Cui
Publisher : Springer
ISBN 13 : 3319108190
Total Pages : 99 pages
Book Rating : 4.3/5 (191 download)
Download or read book On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits written by Qiang Cui and published by Springer. This book was released on 2015-03-10 with total page 99 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book enables readers to design effective ESD protection solutions for all mainstream RF fabrication processes (GaAs pHEMT, SiGe HBT, CMOS). The new techniques introduced by the authors have much higher protection levels and much lower parasitic effects than those of existing ESD protection devices. The authors describe in detail the ESD phenomenon, as well as ESD protection fundamentals, standards, test equipment, and basic design strategies. Readers will benefit from realistic case studies of ESD protection for RFICs and will learn to increase significantly modern RFICs’ ESD safety level, while maximizing RF performance.
Author : Thomas Noulis
Publisher : CRC Press
ISBN 13 : 1482260638
Total Pages : 420 pages
Book Rating : 4.4/5 (822 download)
Download or read book Mixed-Signal Circuits written by Thomas Noulis and published by CRC Press. This book was released on 2018-09-03 with total page 420 pages. Available in PDF, EPUB and Kindle. Book excerpt: Mixed-Signal Circuits offers a thoroughly modern treatment of integrated circuit design in the context of mixed-signal applications. Featuring chapters authored by leading experts from industry and academia, this book: Discusses signal integrity and large-scale simulation, verification, and testing Demonstrates advanced design techniques that enable digital circuits and sensitive analog circuits to coexist without any compromise Describes the process technology needed to address the performance challenges associated with developing complex mixed-signal circuits Deals with modeling topics, such as reliability, variability, and crosstalk, that define pre-silicon design methodology and trends, and are the focus of companies involved in wireless applications Develops methods to move analog into the digital domain quickly, minimizing and eliminating common trade-offs between performance, power consumption, simulation time, verification, size, and cost Details approaches for very low-power performances, high-speed interfaces, phase-locked loops (PLLs), voltage-controlled oscillators (VCOs), analog-to-digital converters (ADCs), and biomedical filters Delineates the respective parts of a full system-on-chip (SoC), from the digital parts to the baseband blocks, radio frequency (RF) circuitries, electrostatic-discharge (ESD) structures, and built-in self-test (BIST) architectures Mixed-Signal Circuits explores exciting opportunities in wireless communications and beyond. The book is a must for anyone involved in mixed-signal circuit design for future technologies.
Author : Marise Bafleur
Publisher : Elsevier
ISBN 13 : 0081011601
Total Pages : 286 pages
Book Rating : 4.0/5 (81 download)
Download or read book ESD Protection Methodologies written by Marise Bafleur and published by Elsevier. This book was released on 2017-07-26 with total page 286 pages. Available in PDF, EPUB and Kindle. Book excerpt: Failures caused by electrostatic discharges (ESD) constitute a major problem concerning the reliability and robustness of integrated circuits and electronic systems. This book summarizes the many diverse methodologies aimed at ESD protection and shows, through a number of concrete studies, that the best approach in terms of robustness and cost-effectiveness consists of implementing a global strategy of ESD protection. ESD Protection Methodologies begins by exploring the various normalized test techniques that are used to qualify ESD robustness as well as characterization and defect localization methods aimed at implementing corrective measures. Due to the increasing complexity of integrated circuits, it is important to be able to provide a simulation in which the implemented ESD protection strategy provides the desired protection, while not harming the performance levels of the circuit. Therefore, the main features and difficulties related to the different types of simulation, finite element, SPICE-type and behavioral, are then studied. To conclude, several case studies are presented which provide real-life examples of the approaches explained in the previous chapters and validate a number of the strategies from component to system level. - Provides a global ESD protection approach from component to system, including both the proposal of investigation techniques and predictive simulation methodologies - Addresses circuit and system designers as well as failure analysis engineers - Provides the description of specifically developed investigation techniques and the application of the proposed methodologies to real case studies
Author : Vladislav A. Vashchenko
Publisher : Springer Science & Business Media
ISBN 13 : 1441965653
Total Pages : 473 pages
Book Rating : 4.4/5 (419 download)
Download or read book ESD Design for Analog Circuits written by Vladislav A. Vashchenko and published by Springer Science & Business Media. This book was released on 2010-07-27 with total page 473 pages. Available in PDF, EPUB and Kindle. Book excerpt: This Book and Simulation Software Bundle Project Dear Reader, this book project brings to you a unique study tool for ESD protection solutions used in analog-integrated circuit (IC) design. Quick-start learning is combined with in-depth understanding for the whole spectrum of cro- disciplinary knowledge required to excel in the ESD ?eld. The chapters cover technical material from elementary semiconductor structure and device levels up to complex analog circuit design examples and case studies. The book project provides two different options for learning the material. The printed material can be studied as any regular technical textbook. At the same time, another option adds parallel exercise using the trial version of a complementary commercial simulation tool with prepared simulation examples. Combination of the textbook material with numerical simulation experience presents a unique opportunity to gain a level of expertise that is hard to achieve otherwise. The book is bundled with simpli?ed trial version of commercial mixed- TM mode simulation software from Angstrom Design Automation. The DECIMM (Device Circuit Mixed-Mode) simulator tool and complementary to the book s- ulation examples can be downloaded from www.analogesd.com. The simulation examples prepared by the authors support the speci?c examples discussed across the book chapters. A key idea behind this project is to provide an opportunity to not only study the book material but also gain a much deeper understanding of the subject by direct experience through practical simulation examples.
