Cmos High Speed Data Recovery Circuit Design Using Matched Delay Sampling Technique

Author : Wei Huang
Publisher :
ISBN 13 : 9781124886626
Total Pages : 115 pages
Book Rating : 4.8/5 (866 download)

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Download or read book Novel High-speed & Multi-function CMOS Signal Processing Circuit written by Wei Huang and published by . This book was released on 2011 with total page 115 pages. Available in PDF, EPUB and Kindle. Book excerpt: A transient waveform digitizer circuit with continuous sampling capability and real-time programmable windowed trigger generation has been fabricated and tested. Designed in 0.25 micro meter CMOS, the digitizer contains a circular array of 128 sample and hold circuits for continuous sample storage, and attains 2 GHz sample speeds with up to 2 GHz analog bandwidth. Sample clock generation adopts a semi-synchronous approach, combining a phase-locked loop for high-speed clock generation and a high-speed fully-differential shift register for distributing clocks to all 128 sample circuits. Using two comparators per sample, the sample voltage levels are compared against reference levels that are set via per-comparator digital to analog converters (DACs). The 256 per-comparator 5-bit DACs compensate for offsets and allow for fine reference level adjustment. The comparator results are matched in 8-sample wide windows against up to 72 programmable patterns in real-time using a programmable logic array. Each trigger window is 8 samples-wide, overlapped sample by sample in a circular fashion through the entire 128 sample array. A trigger is flagged within 15 ns if there is a match, after which on-chip digitization can proceed via 128 parallel 10-bit converters. Unlike the traditional "common-start" devices, this new device is a high-performance yet inexpensive means of detecting a transient signal event whose arrival time is not known beforehand. The primary original advance that this dissertation demonstrates is the use of a real-time trigger system which acts as an "on-chip oscilloscope". It constantly watches the incoming signal, looking for interesting signals. When found, the signals are digitized and fed to remote processing facilities. Without the power of the on-chip trigger system which is looking for specific characteristics, the signal search station will be overwhelmed with false data. Furthermore, the ATWD chip consist a phase-locked loop to generate a very high-speed internal clock from a lower speed external reference clock. This semi-synchronous technique eliminates the need to supply and distribute very high speed system-level clocks. It also has the advantage that the timing jitter in the internal high-speed clock is well controlled compared to previous techniques. With the cooperation of the Physics department of U.C.I., this technology has been demonstrated in Ross Ice Shelf in Antarctica and collected radio signal bounced from the bottom of the ice.