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Author : 林葦婷
Publisher :
ISBN 13 :
Total Pages : pages
Book Rating : 4.:/5 (866 download)
Download or read book A Full Range Digital Calibration in 12-bit Successive Approximation Register Analog-to-Digital Converter written by 林葦婷 and published by . This book was released on 2013 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : 廖亦勛
Publisher :
ISBN 13 :
Total Pages : 0 pages
Book Rating : 4.:/5 (139 download)
Download or read book All Digital Calibration for High-resolution Successive-approximation Register Analog-to-digital Converter written by 廖亦勛 and published by . This book was released on 2022 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Christopher Leonidas David
Publisher :
ISBN 13 :
Total Pages : 370 pages
Book Rating : 4.:/5 (891 download)
Download or read book All Digital, Background Calibration for Time-Interleaved and Successive Approximation Register Analog-to-Digital Converters written by Christopher Leonidas David and published by . This book was released on 2010 with total page 370 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: The growth of digital systems underscores the need to convert analog information to the digital domain at high speeds and with great accuracy. Analog-to-Digital Converter (ADC) calibration is often a limiting factor, requiring longer calibration times to achieve higher accuracy. The goal of this dissertation is to perform a fully digital background calibration using an arbitrary input signal for A/D converters. The work presented here adapts the cyclic "Split-ADC" calibration method to the time interleaved (TI) and successive approximation register (SAR) architectures. The TI architecture has three types of linear mismatch errors: offset, gain and aperture time delay. By correcting all three mismatch errors in the digital domain, each converter is capable of operating at the fastest speed allowed by the process technology. The total number of correction parameters required for calibration is dependent on the interleaving ratio, M. To adapt the "Split-ADC" method to a TI system, 2M+1 half-sized converters are required to estimate 3(2M+1) correction parameters. This thesis presents a 4:1 "Split-TI" converter that achieves full convergence in less than 400,000 samples. The SAR architecture employs a binary weight capacitor array to convert analog inputs into digital output codes. Mismatch in the capacitor weights results in non-linear distortion error. By adding redundant bits and dividing the array into individual unit capacitors, the "Split-SAR" method can estimate the mismatch and correct the digital output code. The results from this work show a reduction in the non-linear distortion with the ability to converge in less than 750,000 samples.
Author : Yi-Long Yu
Publisher :
ISBN 13 : 9781658412636
Total Pages : pages
Book Rating : 4.4/5 (126 download)
Download or read book Statistical Calibration for Two-step Analog-to-digital Conversion written by Yi-Long Yu and published by . This book was released on 2019 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: This thesis describes a two-step, hybrid and reconfigurable data converter using statistical calibration. The two-step analog-to-digital converter (ADC) has a front-end successive-approximation register (SAR) ADC and a back-end time-domain (TD) ADC, which together form a hybrid converter. An inter-stage sample-and-hold amplifier (SHA) doubles the operating speed by allowing the operation to be pipelined. A reconfigurable characteristic allows the converter resolution to be adjusted to be 8, 10 or 12 bits. Digital statistical calibration of ADCs can be implemented without any changes to the analog circuits, which allows it to be compatible with the characteristics of scaled CMOS, allowing potential savings in area and power dissipation. Unfortunately, statistical calibration requires some assumptions about the input density. However, these assumptions are less restrictive in this work than in previous work for two reasons. First, statistical calibration of the mismatch in the front-end capacitor arrays requires only that the input distribution be smooth (instead of requiring that the input be known as in previous work). Also, statistical calibration of inter-stage and back-end errors relies on the assumption that the residue or quantization error from the first stage is uniformly distributed. This residue characteristic holds for many ADC inputs and is intuitively explained in this thesis. To demonstrate the statistical calibration, a prototype ADC is fabricated in 40-nm CMOS technology. In the 12-bit mode at 20 MS/s, the maximum SNDR is 59 dB before calibration and 68 dB after calibration, using 6.2 fJ per conversion-step, excluding the power dissipation required by the calibration and 9.1 fJ per conversion-step including the estimated power dissipation for the calibration.
Author : T. Michael Souders
Publisher :
ISBN 13 :
Total Pages : 84 pages
Book Rating : 4.:/5 ( download)
Download or read book A Calibration Service for Analog-to-digital and Digital-to-analog Converters written by T. Michael Souders and published by . This book was released on 1981 with total page 84 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Minghao Hu
Publisher : Infinite Study
ISBN 13 :
Total Pages : 24 pages
Book Rating : 4./5 ( download)
Download or read book On Neutrosophic Extended Triplet LA-hypergroups and Strong Pure LA-semihypergroups written by Minghao Hu and published by Infinite Study. This book was released on with total page 24 pages. Available in PDF, EPUB and Kindle. Book excerpt: We introduce the notions of neutrosophic extended triplet LA-semihypergroup, neutrosophic extended triplet LA-hypergroup, which can reflect some symmetry of hyperoperation and discuss the relationships among them and regular LA-semihypergroups, LA-hypergroups, regular LA-hypergroups. In particular, we introduce the notion of strong pure neutrosophic extended triplet LA-semihypergroup, get some special properties of it and prove the construction theorem about it under the condition of asymmetry. The examples in this paper are all from Python programs.
Author : Ji Ma
Publisher :
ISBN 13 :
Total Pages : 110 pages
Book Rating : 4.:/5 (892 download)
Download or read book A Study of Capacitor Array Calibration for a Successive Approximation Analog-to-digital Converter written by Ji Ma and published by . This book was released on 2013 with total page 110 pages. Available in PDF, EPUB and Kindle. Book excerpt: Analog-to-digital converters (ADCs) are driven by rapid development of mobile communication systems to have higher speed, higher resolution and lower power consumption. Among multiple ADC architectures, successive approximation (SAR) ADCs attract great attention in mixed-signal design community recently. It is due to the fact that they do not contain amplification components and the digital logics are scaling friendly. Therefore, it is easier to design a SAR ADC with smaller component size in advanced technology than other ADC architectures, which decreases the power consumption and increases the speed of the circuit. However, capacitor mismatch limits the minimum size of unit capacitors which could be used for a SAR ADC with more than 10 bit resolution. Large capacitor both limits conversion speed and increases switching power. In this design project, a novel switching scheme and a novel calibration method are adopted to overcome the capacitor mismatch constraint. The switching scheme uses monotonic switching in a SAR ADC to gain one extra bit, and switches a dummy capacitor between the common mode voltage level (Vcm) and the ground (gnd) to obtain another extra bit. To keep the resolution constant, the capacitor number is reduced by two. The calibration method extracts missing code width to estimate the actual value of capacitors. The missing code extraction is accomplished by detecting metastable state of a comparator, forcing the current bit value and using less significant bits to measure the actual capacitor value. Dither method is adopted to improve calibration accuracy. Behavior model simulation is provided to verify the effectiveness of the calibration method. A circuit design of a 12 bit ADC and the simulation for schematic design is presented in this report.
Author : Walt Kester
Publisher : Newnes
ISBN 13 : 0750678410
Total Pages : 977 pages
Book Rating : 4.7/5 (56 download)
Download or read book Data Conversion Handbook written by Walt Kester and published by Newnes. This book was released on 2005 with total page 977 pages. Available in PDF, EPUB and Kindle. Book excerpt: This complete update of a classic handbook originally created by Analog Devices and never previously published offers the most complete and up-to-date reference available on data conversion, from the world authority on the subject. It describes in depth the theory behind and the practical design of data conversion circuits. It describes the different architectures used in A/D and D/A converters - including many advances that have been made in this technology in recent years - and provides guidelines on which types are best suited for particular applications. It covers error characterization and testing specifications, essential design information that is difficult to find elsewhere. The book also contains a wealth of practical application circuits for interfacing and supporting A/D and D/A converters within an electronic system. In short, everything an electronics engineer needs to know about data converters can be found in this volume, making it an indispensable reference with broad appeal. The accompanying CD-ROM provides software tools for testing and analyzing data converters as well as a searchable pdf version of the text. * brings together a huge amount of information impossible to locate elsewhere. * many recent advances in converter technology simply aren't covered in any other book. * a must-have design reference for any electronics design engineer or technician
Author :
Publisher :
ISBN 13 :
Total Pages : 350 pages
Book Rating : 4.:/5 (228 download)
Download or read book Applying the "split-ADC" Architecture to a 16 Bit, 1 MS/s Differential Successive Approximation Analog-to-digital Converter written by and published by . This book was released on 2008 with total page 350 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: Successive Approximation (SAR) analog-to-digital converters are used extensively in biomedical applications such as CAT scan due to the high resolution they offer. Capacitor mismatch in the SAR converter is a limiting factor for its accuracy and resolution. Without some form of calibration, a SAR converter can only achieve 10 bit accuracy. In industry, the CAL-DAC approach is a popular approach for calibrating the SAR ADC, but this approach requires significant test time. This thesis applies the "Split-ADC" architecture with a deterministic, digital, and background self-calibration algorithm to the SAR converter to minimize test time. In this approach, a single ADC is split into two independent halves. The two split ADCs convert the same input sample and produce two output codes. The ADC output is the average of these two output codes. The difference between these two codes is used as a calibration signal to estimate the errors of the calibration parameters in a modified Jacobi method. The estimates are used to update calibration parameters are updated in a negative feedback LMS procedure. The ADC is fully calibrated when the difference signal goes to zero on average. This thesis focuses on the specific implementation of the "Split-ADC" self-calibrating algorithm on a 16 bit, 1 MS/s differential SAR ADC. The ADC can be calibrated with 105 conversions. This represents an improvement of 3 orders of magnitude over existing statistically-based calibration algorithms. Simulation results show that the linearity of the calibrated ADC improves to within "1 LSB.
Author : Stuart R. Ball
Publisher : Elsevier
ISBN 13 : 0750677236
Total Pages : 336 pages
Book Rating : 4.7/5 (56 download)
Download or read book Analog Interfacing to Embedded Microprocessor Systems written by Stuart R. Ball and published by Elsevier. This book was released on 2004 with total page 336 pages. Available in PDF, EPUB and Kindle. Book excerpt: System Design; Digital to Analog Converters; Sensors; Time-Based Measurements; Output Control Methods; Solenoids, Relays, and Other Analog Outputs; Motors; EMI; High Precision Applications; Standard Interfaces.
Author : 李育丞
Publisher :
ISBN 13 :
Total Pages : 81 pages
Book Rating : 4.:/5 (18 download)
Download or read book A Fast-Fourier-Transform-Based Digital Calibration Technique for Successive-Approximation-Register Analog-to-Digital Converters written by 李育丞 and published by . This book was released on 2018 with total page 81 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Haoyue Wang
Publisher :
ISBN 13 :
Total Pages : 220 pages
Book Rating : 4.:/5 (81 download)
Download or read book Nested Digital Background Calibration of a 12-bit Pipelined ADC Without an Input SHA written by Haoyue Wang and published by . This book was released on 2008 with total page 220 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Rabeeh Majidi
Publisher :
ISBN 13 :
Total Pages : 204 pages
Book Rating : 4.:/5 (916 download)
Download or read book Digitally Assisted Techniques for Nyquist Rate Analog-to-Digital Converters written by Rabeeh Majidi and published by . This book was released on 2015 with total page 204 pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: With the advance of technology and rapid growth of digital systems, low power high speed analog-to- digital converters with great accuracy are in demand. To achieve high effective number of bits Analog-to-Digital Converter (ADC) calibration as a time consuming process is a potential bottleneck for designs. This dissertation presentsa fully digital background calibration algorithm for a 7- bit redundant flash ADC using split structure and look-up table based correction. Redundant comparators are used in the flash ADC design of this work in order to tolerate large offset voltages while minimizing signal input capacitance. The split ADC structure helps by eliminating the unknown input signal from the calibration path. The flash ADC has been designed in 180nm IBM CMOS technology and fabricated through MOSIS. This work was supported by Analog Devices, Wilmington, MA. While much research on ADC design has concentrated on increasing resolution and sample rate, there are many applications (e.g. biomedical devices and sensor networks) that do not require high performance but do require low power energy efficient ADCs. This dissertation also explores on design of a low quiescent current 100k Sps Successive Approximation (SAR) ADC that has been used as an error detection ADC for an automotive application in 350nm CD (CMOS-DMOS) technology. This work was supported by ON Semiconductor Corp, East Greenwich, RI.
Author : Ozan Ersan Erdoğan
Publisher :
ISBN 13 :
Total Pages : 250 pages
Book Rating : 4.:/5 (6 download)
Download or read book Digital Background Calibration of Analog-to-digital Converters Using a Calibration Queue written by Ozan Ersan Erdoğan and published by . This book was released on 1999 with total page 250 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Marc Pastre
Publisher : Springer Science & Business Media
ISBN 13 : 9781402042522
Total Pages : 284 pages
Book Rating : 4.0/5 (425 download)
Download or read book Methodology for the Digital Calibration of Analog Circuits and Systems written by Marc Pastre and published by Springer Science & Business Media. This book was released on 2006 with total page 284 pages. Available in PDF, EPUB and Kindle. Book excerpt: Methodology for the Digital Calibration of Analog Circuits and Systems shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. A complete methodology is proposed, and three applications are detailed. To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced. The first application shows how the sub-binary M/2+M structure can be employed as a conventional digital-to-analog converter if two calibration and radix conversion algorithms are implemented. The second application, a SOI 1T DRAM, is then presented. A digital algorithm chooses a suitable reference value that compensates several circuit imperfections together, from the sense amplifier offset to the dispersion of the memory read currents. The third application is the calibration of the sensitivity of a current measurement microsystem based on a Hall magnetic field sensor. Using a variant of the chopper modulation, the spinning current technique, combined with a second modulation of a reference signal, the sensitivity of the complete system is continuously measured without interrupting normal operation. A thermal drift lower than 50 ppm/°C is achieved, which is 6 to 10 times less than in state-of-the-art implementations. Furthermore, the calibration technique also compensates drifts due to mechanical stresses and ageing.
Author : Anup Savla
Publisher :
ISBN 13 :
Total Pages : pages
Book Rating : 4.:/5 (567 download)
Download or read book Digital Calibration Algorithms for Nyquist-rate Analog to Digital Converters written by Anup Savla and published by . This book was released on 2004 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt: Abstract: Continuous scaling down of CMOS device sizes and an accompanied increase in device switching speeds prompts the design of mixed-signal systems with increasingly complex digital signal processing and control algorithms accompanied by simpler analog circuitry. Analog to digital converter (ADC) is an essential mixed-signal component of modern receivers, where signals sensed from the source are converted to digital for further signal processing on them. In this dissertation, calibration techniques are presented which allow ADCs to be designed with large inherent gain and offset errors. The concept of arbitrary radix multistep conversion is presented, along with algorithms that enable reduced radix conversion with digital correction in pipelined or algorithmic ADCs. Calibration techniques that account for linear and nonlinear gain error are presented and adapted to the popular 1.5 bit/stage pipeline architecture. Calibration is performed purely with digital post-processing on ADC output bits, with no changes occurring in the analog hardware. In this dissertation a WCDMA/WLAN receiver architecture is presented and specifications are derived for all its components. Concept of reconfigurable ADC design is presented, which allows speed and power consumption optimization. Reduced radix digital correction, linear and nonlinear calibration and background-calibrating queues are presented and combined in two behavioral models. The reconfigurable ADC was fabricated in AMI0.5u 3V CMOS process, and achieved 55dB dynamic range at 45MS/s, consuming 51mW power. The reconfigured calibrated ADC was simulated in TSMC 0.18u 1.8V CMOS process, and achieved 63dB dynamic range at 25MS/s, consuming 3.6mW power. Measurements of the capture card showed a 1.6bit improvement in resolution with the use of calibration algorithms.
Author : Heather Renée Richardson
Publisher :
ISBN 13 :
Total Pages : 146 pages
Book Rating : 4.:/5 (868 download)
Download or read book Fault Diagnosis and Redesign of a 12-bit Successive Approximation Analog-to-digital Converter written by Heather Renée Richardson and published by . This book was released on 2013 with total page 146 pages. Available in PDF, EPUB and Kindle. Book excerpt: The objective of this project was to debug and redesign as needed an existing but broken 12-bit successive approximation analog-to-digital converter (SA ADC) for use in an analog front-end integrated circuit in an electrocardiogram monitoring application. The simulation results initially obtained for the SA ADC showed that the converter obtained roughly 6-bit resolution. The redesign effort included correcting problems found in the connections for the reference voltage and biasing circuits, as well as redesigning the successive approximation digital logic.
